Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
MIME-Version: 1.0
In-Reply-To: <20180723142956.3718-1-baijiaju1990@gmail.com>
References: <20180723142956.3718-1-baijiaju1990@gmail.com>
From:   Alex Deucher <alexdeucher@gmail.com>
Date:   Tue, 24 Jul 2018 16:49:33 -0400
Message-ID: <CADnq5_MWJhQfqYL7KOnx5O+WfgZT01PhvPpROMj2_CeCCaA+iQ@mail.gmail.com>
Subject: Re: [PATCH] gpu: drm: amdgpu: Replace mdelay with msleep in cik_pcie_gen3_enable()
To:     Jia-Ju Bai <baijiaju1990@gmail.com>
Cc:     "Deucher, Alexander" <alexander.deucher@amd.com>,
        Christian Koenig <christian.koenig@amd.com>,
        Chunming Zhou <David1.Zhou@amd.com>,
        Dave Airlie <airlied@linux.ie>, Rex Zhu <Rex.Zhu@amd.com>,
        "Wentland, Harry" <harry.wentland@amd.com>,
        "Li, Samuel" <Samuel.Li@amd.com>,
        Maling list - DRI developers 
        <dri-devel@lists.freedesktop.org>,
        amd-gfx list <amd-gfx@lists.freedesktop.org>,
        LKML <linux-kernel@vger.kernel.org>
Content-Type: text/plain; charset="UTF-8"
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

On Mon, Jul 23, 2018 at 10:29 AM, Jia-Ju Bai <baijiaju1990@gmail.com> wrote:
> cik_pcie_gen3_enable() is only called by cik_common_hw_init(), which is
> never called in atomic context.
> cik_pcie_gen3_enable() calls mdelay() to busily wait, which is not
> necessary.
> mdelay() can be replaced with msleep().
>
> This is found by a static analysis tool named DCNS written by myself.
>
> Signed-off-by: Jia-Ju Bai <baijiaju1990@gmail.com>

Applied.  thanks!

Alex

> ---
>  drivers/gpu/drm/amd/amdgpu/cik.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
> index 0df22030e713..5b7fab2c2008 100644
> --- a/drivers/gpu/drm/amd/amdgpu/cik.c
> +++ b/drivers/gpu/drm/amd/amdgpu/cik.c
> @@ -1476,7 +1476,7 @@ static void cik_pcie_gen3_enable(struct amdgpu_device *adev)
>                                 tmp |= PCIE_LC_CNTL4__LC_REDO_EQ_MASK;
>                                 WREG32_PCIE(ixPCIE_LC_CNTL4, tmp);
>
> -                               mdelay(100);
> +                               msleep(100);
>
>                                 /* linkctl */
>                                 pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL, &tmp16);
> --
> 2.17.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx