Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp471121imm; Wed, 25 Jul 2018 00:00:39 -0700 (PDT) X-Google-Smtp-Source: AAOMgpdoAgNhZ6Fq5koh5ZHYgLDoHcdn39eVSdGeTdfoWcLNg/L1eT2Fi0l4AoCWlCKYf3Rc/cKO X-Received: by 2002:a62:1603:: with SMTP id 3-v6mr20797354pfw.245.1532502039609; Wed, 25 Jul 2018 00:00:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532502039; cv=none; d=google.com; s=arc-20160816; b=KnbSq48Q08VPCvbt1lT+3Hd2QocsNL3L+tKU9PeDHvVZKVZ1OU0wLM7YM2R1scOXJy nhrJa3TnYwf3UvoyZ4CKCgzKa7bhYsKPJIv4CdOog6A/EyLXzNq7vW6rxC1v7LRgp1xQ Hk3Uyxv8+XW5QT9hAfuZZ5EitAl7KqoLenHEMUyTHuih7zGAQ6t50wFMq1IVUtM+iGtw jgaJAFKBuU8I4+lm/Q1dwOg8dFvNaSjt8lBPqVOVyJae6zOKDYqyWHG372Y5tuMlzGDV tPJl9H8H+EjEnt2Enx+7NcPH8WQUYGavJ0I7nScegcWd04gy7PuiBCG1PBGZRn75G6ON mExQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=ypn1VZYtfLPJ/2OFX7+IAG5V1o1IG5l5MI+F5lKK4+s=; b=UM3HgMK9ZREATL3b19h4KwUE7Knp6MK09Kc331v0HCAqVCcuu5jXN+Z/4sCS6p346Z qvARpKty67+TIlpnbpAyqD3Zv2d5YDBl4j9uNTr+qI2lkort6XLkylBkDdhfL4GQzvek R5/4afb59zlwcy6C4XgfEeM4eO7aASMYDrHip6639lp1Hw2VxKkMAiQPoCN2VohkmGO0 UF1wSyPacniYwUhleWTHgMeiFDcO7xV5vt3CM5JqX3Vk8QbrXgYflJpgnMPDGz3nfFRf 7jj7fUOSmYvc7qiCTtKSSY2AexM1wA6eEZmgGVQAtw6vVJlC4YYEM+xhkg/2FxyUeFiY dAMQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n11-v6si12024712pgv.242.2018.07.25.00.00.24; Wed, 25 Jul 2018 00:00:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728951AbeGYIJn (ORCPT + 99 others); Wed, 25 Jul 2018 04:09:43 -0400 Received: from mo4-p04-ob.smtp.rzone.de ([85.215.255.124]:36575 "EHLO mo4-p04-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728763AbeGYIJm (ORCPT ); Wed, 25 Jul 2018 04:09:42 -0400 X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o12DNO4Ij0pB1ZSLA74=" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 43.13 DYNA|AUTH) with ESMTPSA id 6047f4u6P6xGd5w (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (curve secp521r1 with 521 ECDH bits, eq. 15360 bits RSA)) (Client did not present a certificate); Wed, 25 Jul 2018 08:59:16 +0200 (CEST) From: "H. Nikolaus Schaller" To: Marek Belisko , =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Tony Lindgren , Rob Herring , Mark Rutland Cc: linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org, "H. Nikolaus Schaller" Subject: [PATCH 32/32] ARM: dts: omap3-gta04a5one: define GTA04A5 variant with OneNAND Date: Wed, 25 Jul 2018 08:59:04 +0200 Message-Id: <51523efb93cd30a233d5c41918d5a08b2231647e.1532501910.git.hns@goldelico.com> X-Mailer: git-send-email 2.12.2 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org GTA04A5 has been produced with MCP chips either with 512MB RAM + 512MB NAND 512MB RAM + 1024MB NAND 1024MB RAM + 512MB OneNAND RAM setup is done by U-Boot (MLO/SPL) but OneNAND needs a different setup of the GPMC. So we need to derive a DTB variant that modifies the gpmc and nand setup. Signed-off-by: H. Nikolaus Schaller --- arch/arm/boot/dts/omap3-gta04a5one.dts | 114 +++++++++++++++++++++++++++++++++ 1 file changed, 114 insertions(+) create mode 100644 arch/arm/boot/dts/omap3-gta04a5one.dts diff --git a/arch/arm/boot/dts/omap3-gta04a5one.dts b/arch/arm/boot/dts/omap3-gta04a5one.dts new file mode 100644 index 000000000000..9b7bbdc344b3 --- /dev/null +++ b/arch/arm/boot/dts/omap3-gta04a5one.dts @@ -0,0 +1,114 @@ +/* + * Copyright (C) 2014-18 H. Nikolaus Schaller + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "omap3-gta04a5.dts" + +&omap3_pmx_core { + model = "Goldelico GTA04A5/Letux 2804 with OneNAND"; + + gpmc_pins: pinmux_gpmc_pins { + pinctrl-single,pins = < + + /* address lines */ + OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */ + OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */ + OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */ + + /* data lines, gpmc_d0..d7 not muxable according to TRM */ + OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */ + OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */ + OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */ + OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */ + OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */ + OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */ + OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */ + OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */ + + /* + * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable + * according to TRM. OneNAND seems to require PIN_INPUT on clock. + */ + OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */ + OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */ + >; + }; +}; + +&gpmc { + /* switch inherited setup to OneNAND */ + + ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */ + pinctrl-names = "default"; + pinctrl-0 = <&gpmc_pins>; + + /delete-node/ nand@0,0; + + onenand@0,0 { + + #address-cells = <1>; + #size-cells = <1>; + compatible = "ti,omap2-onenand"; + reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */ + + gpmc,sync-read; + gpmc,sync-write; + gpmc,burst-length = <16>; + gpmc,burst-read; + gpmc,burst-wrap; + gpmc,burst-write; + gpmc,device-width = <2>; + gpmc,mux-add-data = <2>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <87>; + gpmc,cs-wr-off-ns = <87>; + gpmc,adv-on-ns = <0>; + gpmc,adv-rd-off-ns = <10>; + gpmc,adv-wr-off-ns = <10>; + gpmc,oe-on-ns = <15>; + gpmc,oe-off-ns = <87>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <87>; + gpmc,rd-cycle-ns = <112>; + gpmc,wr-cycle-ns = <112>; + gpmc,access-ns = <81>; + gpmc,page-burst-access-ns = <15>; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <0>; + gpmc,wait-monitoring-ns = <0>; + gpmc,clk-activation-ns = <5>; + gpmc,wr-data-mux-bus-ns = <30>; + gpmc,wr-access-ns = <81>; + gpmc,sync-clk-ps = <15000>; + + x-loader@0 { + label = "X-Loader"; + reg = <0 0x80000>; + }; + + bootloaders@80000 { + label = "U-Boot"; + reg = <0x80000 0x1c0000>; + }; + + bootloaders_env@240000 { + label = "U-Boot Env"; + reg = <0x240000 0x40000>; + }; + + kernel@280000 { + label = "Kernel"; + reg = <0x280000 0x600000>; + }; + + filesystem@880000 { + label = "File System"; + reg = <0x880000 0>; /* 0 = MTDPART_SIZ_FULL */ + }; + + }; +}; -- 2.12.2