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From:   =?UTF-8?B?QmrDtnJuIFTDtnBlbA==?= <bjorn.topel@gmail.com>
Date:   Thu, 26 Jul 2018 14:18:27 +0200
Message-ID: <CAJ+HfNh19+_7oPBXAfGYksKRGHD=B1pJ6qfu8ta_BDza75YsGw@mail.gmail.com>
Subject: Re: [PATCH v2 bpf-next] samples/bpf: xdpsock: order memory on AArch64
To:     Brian Brooks <brian.brooks@linaro.org>
Cc:     ast@kernel.org, Daniel Borkmann <daniel@iogearbox.net>,
        =?UTF-8?B?QmrDtnJuIFTDtnBlbA==?= <bjorn.topel@intel.com>,
        "Karlsson, Magnus" <magnus.karlsson@intel.com>,
        Netdev <netdev@vger.kernel.org>,
        LKML <linux-kernel@vger.kernel.org>
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Den ons 25 juli 2018 kl 23:09 skrev Brian Brooks <brian.brooks@linaro.org>:
>
> Define u_smp_rmb() and u_smp_wmb() to respective barrier instructions.
> This ensures the processor will order accesses to queue indices against
> accesses to queue ring entries.
>

Thanks Brian!

Acked-by: Bj=C3=B6rn T=C3=B6pel <bjorn.topel@intel.com>

> Signed-off-by: Brian Brooks <brian.brooks@linaro.org>
> ---
>  samples/bpf/xdpsock_user.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/samples/bpf/xdpsock_user.c b/samples/bpf/xdpsock_user.c
> index 5904b1543831..1e82f7c617c3 100644
> --- a/samples/bpf/xdpsock_user.c
> +++ b/samples/bpf/xdpsock_user.c
> @@ -145,8 +145,13 @@ static void dump_stats(void);
>         } while (0)
>
>  #define barrier() __asm__ __volatile__("": : :"memory")
> +#ifdef __aarch64__
> +#define u_smp_rmb() __asm__ __volatile__("dmb ishld": : :"memory")
> +#define u_smp_wmb() __asm__ __volatile__("dmb ishst": : :"memory")
> +#else
>  #define u_smp_rmb() barrier()
>  #define u_smp_wmb() barrier()
> +#endif
>  #define likely(x) __builtin_expect(!!(x), 1)
>  #define unlikely(x) __builtin_expect(!!(x), 0)
>
> --
> 2.18.0
>