Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp384559imm; Thu, 26 Jul 2018 05:28:17 -0700 (PDT) X-Google-Smtp-Source: AAOMgpdx2aPM83x3e6q7t5K8Xu4E9JIDaSUA3outJTjBFBFDmdHtAtB5V3pV9CtZoBev2lSRcayD X-Received: by 2002:a63:5463:: with SMTP id e35-v6mr1774240pgm.115.1532608097870; Thu, 26 Jul 2018 05:28:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532608097; cv=none; d=google.com; s=arc-20160816; b=BqV11766zBRfoAhwhEPPg6tlo45qbabNh+9YV97hPESvs1R49Zf9zXuAX9mB8reLv7 eU6iiCIGUJjvDnXLQ8nLSEDsoXUeP12lopSw1dcGWs8RJV87/FM4AAn2US7HSvQgwwqF TeroDOT6hXJgqNakQAr0pewWtEqDGu4m6oGrRe7ncw/woHLmYueL6UDE3zr4C/TyVmae SeQ8anTUh8tuYG6rTcZGVpY5jzSOq9dwzC9zs3mZDFny4tbsRLRTKEO7UB9SrAeEhjg6 iUkul7A22cTuhtR2QTAwgtTZ850VOC6BR5zRFYuD0U90k86NOobKL0jGb/3oR4pfKhyz JWfQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=EF14olvgX7RRNTsEwiy8YIKitRLuC61AqXdpzlQDMCw=; b=uWB269ly55I9dMzecSDT8AX6Qp0RJiSFpLQSX1pks9WwZ1Egd3JBoWaTlsyLk7Z6vw qUw4gb/olbcm088TN+jFzLC1cSKs/hhwN3DVQIcMiz593vAzFwrmmKi5pD6pZcxw/sO/ ThaxuTwAkYESb2dQnnNEXz2mmBTHiANMq/2a3z9f7IZ9SDBbCVe8W0lmS9E+UQPUoCH3 UnCo0de2hQnuO0BkfEOqbhRKiXMtD+gH73A8iYjNRv7tNs6KtNTg/ucL0r688lngL3P8 ybRR8QS3sOJ2frkoq60P/oR7aH6wR5yUR9b9Ak7SWuHVWIZ07GF3i8J3PQ5hUbhpRFo3 hdDA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e6-v6si1146108pls.419.2018.07.26.05.28.03; Thu, 26 Jul 2018 05:28:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731411AbeGZNno (ORCPT + 99 others); Thu, 26 Jul 2018 09:43:44 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:16968 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730178AbeGZNnn (ORCPT ); Thu, 26 Jul 2018 09:43:43 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com (using TLS: TLSv1, AES128-SHA) id ; Thu, 26 Jul 2018 05:27:07 -0700 Received: from HQMAIL107.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Thu, 26 Jul 2018 05:27:06 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 26 Jul 2018 05:27:06 -0700 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 26 Jul 2018 12:27:05 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Thu, 26 Jul 2018 12:27:05 +0000 Received: from dhcp-10-21-25-168.Nvidia.com (Not Verified[10.21.25.201]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Thu, 26 Jul 2018 05:27:05 -0700 From: Aapo Vienamo To: Ulf Hansson , Rob Herring , Mark Rutland , Thierry Reding , Jonathan Hunter , Adrian Hunter , Mikko Perttunen CC: , , , , Aapo Vienamo Subject: [PATCH v2 01/10] mmc: tegra: Poll for calibration completion Date: Thu, 26 Jul 2018 15:26:47 +0300 Message-ID: <1532608016-14319-2-git-send-email-avienamo@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532608016-14319-1-git-send-email-avienamo@nvidia.com> References: <1532608016-14319-1-git-send-email-avienamo@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Implement polling with 10 ms timeout for automatic pad drive strength calibration. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 9587365..27b5ef9 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -49,6 +50,9 @@ #define SDHCI_AUTO_CAL_START BIT(31) #define SDHCI_AUTO_CAL_ENABLE BIT(29) +#define SDHCI_TEGRA_AUTO_CAL_STATUS 0x1ec +#define SDHCI_TEGRA_AUTO_CAL_ACTIVE BIT(31) + #define NVQUIRK_FORCE_SDHCI_SPEC_200 BIT(0) #define NVQUIRK_ENABLE_BLOCK_GAP_DET BIT(1) #define NVQUIRK_ENABLE_SDHCI_SPEC_300 BIT(2) @@ -229,13 +233,20 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask) static void tegra_sdhci_pad_autocalib(struct sdhci_host *host) { - u32 val; + u32 reg; + int ret; + + reg = sdhci_readl(host, SDHCI_TEGRA_AUTO_CAL_CONFIG); + reg |= SDHCI_AUTO_CAL_ENABLE | SDHCI_AUTO_CAL_START; + sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); - mdelay(1); + /* 10 ms timeout */ + ret = readl_poll_timeout(host->ioaddr + SDHCI_TEGRA_AUTO_CAL_STATUS, + reg, !(reg & SDHCI_TEGRA_AUTO_CAL_ACTIVE), + 1, 10000); - val = sdhci_readl(host, SDHCI_TEGRA_AUTO_CAL_CONFIG); - val |= SDHCI_AUTO_CAL_ENABLE | SDHCI_AUTO_CAL_START; - sdhci_writel(host,val, SDHCI_TEGRA_AUTO_CAL_CONFIG); + if (ret) + dev_err(mmc_dev(host->mmc), "Pad autocal timed out\n"); } static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) -- 2.7.4