Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp776598imm; Thu, 26 Jul 2018 11:48:16 -0700 (PDT) X-Google-Smtp-Source: AAOMgpf/SWtIudEOVXDQUpVEO6PuGRNIvYW5e96TsSaBC2LLHObuvqJS+Xme27RPEX0zLXKM2EMZ X-Received: by 2002:a63:9e0a:: with SMTP id s10-v6mr3026958pgd.326.1532630896713; Thu, 26 Jul 2018 11:48:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532630896; cv=none; d=google.com; s=arc-20160816; b=yoHaskSk3IlF51LVycZA+gAIee+1RsHa5aLh2A+g8eZ2ZKrHHWh6FWP08hRtpesgY7 ufRHMv2tOqgB6yLFQIOTViwyxvXI/CZapv4BN/muJ2nWjRfCz8d81ko7pCKF79YdRSDL 9rrWoVaadggbACV7YdbkYmV8X9bcwUV+jQc+DOznvFJEvseozuntIsbMKnwsjanASvBj 4Q4ZxjUFN1NH2j48KkJJnRuO+DjEdGx8vASWyAMshrHBlRftOyhLOX8pOUJOaM9BlLEC 8yXzWRdQOPz2cmr4g4hz+E1OWDz45CVmCtxi8VTl4HFqixGckCIBxQyDtKQiacK76wlf jCGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=FEQsGF/z+IC5GKEWg4Z8bOH5CkHOQ3dYiDLc6gJuzY0=; b=X+LmJhxJucv/cuffaoZ6OLMXIpajM98HbDRa3eX+NbATLrYpj1oVEUgw7ViAc3pjoW +dm6kcvJ0k2ihPfiRNhEIHMJV/YRZvEGKA6tJEtaxgPRUtljzGryRHsRsHhavuGTw6X3 NaXZxv/6wy684geQrIBmATLHu7vaSodJ5X/BwXSUaWTPRRou1QBKfNNTAcOrnVZzPkcm ZqJr82UqyR+T3mRKXGTRnsk/u3itCHvi18NM6QGehlAqPGuu3vkJc5DLOpNaSe3/0can 0Lz7NxOkUnOd17Q/sjMv1FZXZwJES4S+DV2gMZKHngz5VkvGslimxXOOr9DTq8sjAa0I 2pRA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d14-v6si1716692plr.244.2018.07.26.11.48.01; Thu, 26 Jul 2018 11:48:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388732AbeGZSef (ORCPT + 99 others); Thu, 26 Jul 2018 14:34:35 -0400 Received: from hermes.aosc.io ([199.195.250.187]:58228 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731613AbeGZSef (ORCPT ); Thu, 26 Jul 2018 14:34:35 -0400 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id 078719FAEE; Thu, 26 Jul 2018 17:16:24 +0000 (UTC) From: Icenowy Zheng To: Maxime Ripard , Rob Herring , Chen-Yu Tsai , Jagan Teki , Jernej Skrabec Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [PATCH v3.1 06/10] dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO[0-1] macros Date: Fri, 27 Jul 2018 01:12:53 +0800 Message-Id: <20180726171257.6688-7-icenowy@aosc.io> In-Reply-To: <20180726171257.6688-1-icenowy@aosc.io> References: <20180726171257.6688-1-icenowy@aosc.io> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jagan Teki Allwinner A64 has two clock parents PLL_VIDEO0 and PLL_VIDEO1. Include these macros on dt-bindings so-that the same can be used while defining CCU clock phadles. Signed-off-by: Jagan Teki Reviewed-by: Rob Herring Signed-off-by: Icenowy Zheng --- Changes for v3.1: - none Changes for v3: - collect Rob r-w-b tag Changes for v2: - new patch include/dt-bindings/clock/sun50i-a64-ccu.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h index d66432c6e675..d1d7d5b7d06a 100644 --- a/include/dt-bindings/clock/sun50i-a64-ccu.h +++ b/include/dt-bindings/clock/sun50i-a64-ccu.h @@ -43,7 +43,9 @@ #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_ #define _DT_BINDINGS_CLK_SUN50I_A64_H_ +#define CLK_PLL_VIDEO0 7 #define CLK_PLL_PERIPH0 11 +#define CLK_PLL_VIDEO1 15 #define CLK_BUS_MIPI_DSI 28 #define CLK_BUS_CE 29 -- 2.18.0