Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp91287imm; Thu, 26 Jul 2018 14:33:35 -0700 (PDT) X-Google-Smtp-Source: AAOMgpe3EK2ugATTXGvXzbbtz9zF8uFdUBjV4KhF/AdzzcK/6zY2VNIUuIpfBWwq4OddSqGlPV3R X-Received: by 2002:a17:902:b08a:: with SMTP id p10-v6mr3388853plr.217.1532640814927; Thu, 26 Jul 2018 14:33:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532640814; cv=none; d=google.com; s=arc-20160816; b=rKXCP9YxYoqqV8t/wD+NX7ZIGUxCefyhMr1ss1Ir8uZsoZLYOD5cD3Q7CT+wy36Aya 7RB7MBPOhgX6fAN4mRs7uBvCjD8UVEEqNyfW7irQjmGTbB413JAB2c/ALU+eWWTfZqrm SiO8fmjeN/kK6FgDXne3YWqXZ4B6/b5WHBW/z6OY0Czawxyup+UVTHQSXTWvLkk18YbZ ExuA5QO3LGDxrmWTvLiSUJAfaBX9ef1M55cEYVZ/d/VXrGrz5MzyBoEi0qP23UAk/7ND ee9rsPdqC3/zFwSGLDfFQn1CbUdvjtq1UCBTpso45Z6DL0ZqrWqnCJNMSEe/3i8Npw3j 6nTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :references:in-reply-to:mime-version:dkim-signature :arc-authentication-results; bh=/hRtxg6fUQ0gL3QOyE0ZRNMMYRDIL7yKstkNtMoIl1k=; b=x4XHAB9NvplWo/QaptKbwQdCezT//qBaK7jDAhkVtZ6cyG8bZpd2oOYl4mmI3bbrmY gyPdgEQlqEVrReRpEBKbAoGfDWCcHw0VEeKZT0ixIh2HwQ8AkPWV7wh6+Cs7YaAhg3rU JaJH2ORNyOxD01vpH92xd1wGAOBGDE1eskeq81aoNKdETGSfIgbVMu9kal4P3ekfOhlu ZunwRz7QtW8OYPiFUOq45hUYe8m9urK+R3keHqTUEgaA6w3EJwKe0FXgUkKE1Emn34UA 7ygenDpCoXXwn9k2WThp3e+Ts6H7BafdifPuTIjbieIOengZxHkNxJnWFSX3Gy2ZfZhx kq8g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=k1JbkkeA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o23-v6si1960830pgv.518.2018.07.26.14.33.20; Thu, 26 Jul 2018 14:33:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=k1JbkkeA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731662AbeGZWuD (ORCPT + 99 others); Thu, 26 Jul 2018 18:50:03 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:36119 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730701AbeGZWuD (ORCPT ); Thu, 26 Jul 2018 18:50:03 -0400 Received: by mail-pg1-f193.google.com with SMTP id s7-v6so1923284pgv.3; Thu, 26 Jul 2018 14:31:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=/hRtxg6fUQ0gL3QOyE0ZRNMMYRDIL7yKstkNtMoIl1k=; b=k1JbkkeAV2hqsnBb0S4lCYNAHxPR3ilRjLAGrOzbviUKpu2MzYGxdz3la36uhP3Mrg JyrMBPNvy+glBS8yWQ2r2wec92u+AqO47IUceMeKXeO8vRJg+RTrEIsFlr10yU3jCUuB Lg2CiokJUC99uuUVeB1cYFXHf7UHnCUMsuJgavh3KVlrduXUUud5mzUOxVShi9CZr+nR blTMTzBwY/+BFMQuh3nC28+Xma95uMhEXxMt01hknaE7O/NMvOW95ND66dwYes0yNwAh EdToBGSRiZd9wfrcAYSLtVlw5kreTYZsLcQC2fPzNuIQh97Q6DViHQzsrDawZgc0DaMp hdrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=/hRtxg6fUQ0gL3QOyE0ZRNMMYRDIL7yKstkNtMoIl1k=; b=QzRENd2OZfT31UVpEdYmgy/bKjtFbZyOxFLSVAP7VLD9U2U2mxlaT0WMqAEVIAR+6p 28AxQy0/w+v975k79bww2xvjIF1EmAS20VIutl/XdL2DLnjDKVWe7njEGAMRDk/RP7R+ E6brqq2Sf61jzgJ/nMox+P33lY5rlEoShJJu/4NQzpe5NRNJTbPdasxTVHSbtpHzgS/j 9TmQ7JIgIzYsxKAnkfEYeEzgt8/aYBXfg9Vl6i7ondy+0o8jFKqyZswriY1hw9yRNLOO WHcW3VIn+fnThE3rhEFkhSsnEvRfgDgHao1yv6X18Iq3/9p52QY7WaeU4+I2pJ0xgqt/ /l+Q== X-Gm-Message-State: AOUpUlHgDwmUs7Mo1+JYwgG7Cd1bL8jsbTCoCqCO3mFb6MgQo0BesCrM T98ZoKlO9aWT/0QCvgCEiDrI1fywZreXizY7oH8= X-Received: by 2002:a65:5286:: with SMTP id y6-v6mr3451967pgp.65.1532640682596; Thu, 26 Jul 2018 14:31:22 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a17:90a:6d90:0:0:0:0 with HTTP; Thu, 26 Jul 2018 14:31:02 -0700 (PDT) In-Reply-To: References: <1515109891-17133-1-git-send-email-jliang@xilinx.com> <1515109891-17133-3-git-send-email-jliang@xilinx.com> From: Wendy Liang Date: Thu, 26 Jul 2018 14:31:02 -0700 Message-ID: Subject: Re: [PATCH v3 2/2] dt-bindings: mailbox: Add Xilinx IPI Mailbox To: Jassi Brar Cc: Jiaying Liang , Michal Simek , Rob Herring , Mark Rutland , "linux-arm-kernel@lists.infradead.org" , Devicetree List , Linux Kernel Mailing List , Sudeep Holla , Andre Przywara Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jan 9, 2018 at 8:42 PM, Jassi Brar wrote: > On Wed, Jan 10, 2018 at 6:52 AM, Jiaying Liang wrote: >>> From: Jassi Brar [mailto:jassisinghbrar@gmail.com] > >>> > + >>> > +Controller Device Node: >>> > +=========================== >>> > +Required properties: >>> > +-------------------- >>> > +- compatible: Shall be: "xlnx,zynqmp-ipi-mailbox" >>> > +- reg: IPI buffers address ranges >>> > +- reg-names: Names of the reg resources. It should have: >>> > + * local_request_region >>> > + - IPI request msg buffer written by local and read >>> > + by remote >>> > + * local_response_region >>> > + - IPI response msg buffer written by local and read >>> > + by remote >>> > + * remote_request_region >>> > + - IPI request msg buffer written by remote and read >>> > + by local >>> > + * remote_response_region >>> > + - IPI response msg buffer written by remote and read >>> > + by local >>> > >>> shmem is option and external to the controller. It should be passed via >>> client's binding. >>> Please have a look at Sudeep's proposed patch >>> https://www.spinics.net/lists/arm-kernel/msg626120.html >> [Wendy] thanks for the link, but those 'buffers" are registers in the hardware >> but not memory. >> > No, that is for memory, not registers. > Please have a more careful look at the patch. Sorry for very late response. Those are not the normal memory but device memories, they are 32bytes fixed request buffers and response buffers per channel. They come from the IPI hardware block. The mailbox framework API "mbox_send_message()" allows users to send message to the mailbox. in this case, just not clear on why we cannot have the buffer in the controller? These memories are not for sharing data, but just for short notification messages. > >>> >>> > +- #mbox-cells: Shall be 1. It contains: >>> > + * tx(0) or rx(1) channel >>> > +- xlnx,ipi-ids: Xilinx IPI agent IDs of the two peers of the >>> > + Xilinx IPI communication channel. >>> > +- interrupt-parent: Phandle for the interrupt controller >>> > +- interrupts: Interrupt information corresponding to the >>> > + interrupt-names property. >>> > + >>> > +Optional properties: >>> > +-------------------- >>> > +- method: The method of accessing the IPI agent registers. >>> > + Permitted values are: "smc" and "hvc". Default is >>> > + "smc". >>> > + >>> Andre almost implemented the generic driver. Can you please have a look at >>> https://www.spinics.net/lists/arm-kernel/msg595416.html >>> and see if you can just finish it off? >> [Wendy] This mailbox controller is about to use Xilinx IPI hardware as mailbox. >> > I couldn't find anything specific to Xilinx h/w > zynqmp_ipi_fw_call() is same as arm_smc_send_data() in Andre's driver > (though it needs to pass on [R2,R7] as I suggested in reply to him). > >> We use it to send notification/short request to firmware (usually running on >> another core on SoC), >> > So does Andre's driver. Which is precise and generic, so I much prefer that. > >> and also to receive notification/short request from firmware. >> Interrupt is used in the receiving direction. It looks different to the usage of >> mailbox driver from the link. >> > Yes, there is some difference. But nothing related to your h/w. > Andre's driver assume synchronous transmits where the response is > filled in the regs upon return. > What kind of calls do you make to your remote firmware? I would expect > them to be 'fast'. The reason to have this mailbox driver is because, we have an hardware block for IPI, this hardware block has registers and buffers and we want to to use Linux kernel mailbox framework APIs such as mbox_send_message() and rx_callback in client drivers to send notification or short request to other processors and receive response and request. The reason to use SMC calls to access the registers is because we have the case that both the ATF and Linux kernel drive will need to access the same registers. I have looked at the arm_smc patch, it looks like it is for synchronous request, and only allow 32bit message. In our case, we need to: * besides synchronous request, we also need to handle asynchronous request. The driver will monitor the interrupt to see if there is a message from the other core. If yes, it will notify the client from rx_callback. * put 32bytes short message to the mailbox. Thanks, Wendy > >> Is there a plan to extend the ARM SMC mailbox driver >> to both trigger firmware actions and receive request from firmware? >> > Sure if we have a genuine requirement we can support RX path as well. > > Thanks.