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[209.132.180.67]) by mx.google.com with ESMTP id y63-v6si9866296pgb.5.2018.07.30.01.47.23; Mon, 30 Jul 2018 01:47:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726641AbeG3KTR (ORCPT + 99 others); Mon, 30 Jul 2018 06:19:17 -0400 Received: from mail.bootlin.com ([62.4.15.54]:50109 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726530AbeG3KTR (ORCPT ); Mon, 30 Jul 2018 06:19:17 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id 24B8F207AC; Mon, 30 Jul 2018 10:45:19 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (AAubervilliers-681-1-89-120.w90-88.abo.wanadoo.fr [90.88.30.120]) by mail.bootlin.com (Postfix) with ESMTPSA id E610D20712; Mon, 30 Jul 2018 10:45:18 +0200 (CEST) Date: Mon, 30 Jul 2018 10:45:19 +0200 From: Maxime Ripard To: Diego Rondini Cc: Rob Herring , Mark Rutland , Chen-Yu Tsai , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, Jagan Teki Subject: Re: [PATCH] ARM: dts: sun8i: Add initial Orangepi Zero Plus 2 H3 support Message-ID: <20180730084519.iqyhvocxsfuopze7@flea> References: <20180727125739.22871-1-diego.rondini@kynetics.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="5k6awrech3twpden" Content-Disposition: inline In-Reply-To: <20180727125739.22871-1-diego.rondini@kynetics.com> User-Agent: NeoMutt/20180622 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --5k6awrech3twpden Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Jul 27, 2018 at 02:57:39PM +0200, Diego Rondini wrote: > +/dts-v1/; > + > +#include "sun8i-h3.dtsi" > + > +#include > + > +/ { > + model =3D "OrangePi Zero Plus2 H3"; > + compatible =3D "xunlong,orangepi-zero-plus2", "allwinner,sun8i-h3"; The H5 version doesn't make that easy, and it's unfortunate, but we should have a different compatible for the H3 and H5 versions. What about something like xunlong,orangepi-zero-plus2-h3? > +&uart1 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&uart1_pins>, <&uart1_rts_cts_pins>; > + status =3D "okay"; > +}; I guess it is the BT chip? Which chip is it? Maxime --=20 Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com --5k6awrech3twpden Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAlte0B4ACgkQ0rTAlCFN r3RUsw//XAW2TzGtAUTQAnxNUtQ0F2XjYNgy4BetgY1fO/ZFh01RV1yEelDFhXba dSJA29WRhmMSvq4/dET5NqDixXPeg5higpqJiSEBDlBI5BsQ/J1V92NSfP3gz4DT NW8HKZZO7B8eDyDfvDiL0FT8Ze34f37IrXTW+zOR5E/VcVKmOLLUNchz+eH1rhA2 QfjD0HVato0jcJVJJhiiatih2IAySqwumIOEUdWvNBSShJAj27UGDWSWHT62rrCu 8k/xoHVr3id0nvQ3t3vN2jHYlde3gIpyNlDHfym5xggD+zOb0+HOSuXYkeWliRZn YblhjSr5MQ+klgEBeZ3n5SmLGemiEFaotMcAZB++qXT3NO6+GCZBqcxudWJEZ9DU qvWAT5+Dd1+gTAF5zc8xftxGtucCo6zsAFYOx/iOpiBqM+pxLtdfGYT9dzK+C3XQ kiXCWcY1ckxDE943+pQMIJQXZPTb+09f7IvoZwTM+x1aYUYuadNMWb3mhmCuPLzD srufORl5KG4q2isp8Yr8Dvd2Fgimw+7g83R///Px0PUe/CH14b9Zx9GEKm9X4AbR LYkIpNXPTnTQgsysdMoIH4RqEqetk5VKaV9X2XRUKFbeo3kTIdTMQWHGNTAgVbGe fQ6Ckz9wINEgLJQcPPAolpVkls7kuE+TEBGmDORZ/GKotcghsYg= =T3pi -----END PGP SIGNATURE----- --5k6awrech3twpden--