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Date:   Mon, 30 Jul 2018 14:25:27 +0200 (CEST)
From:   Thomas Gleixner <tglx@linutronix.de>
To:     Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
cc:     x86@kernel.org, linux-kernel@vger.kernel.org,
        Tim C Chen <tim.c.chen@intel.com>,
        Dave Hansen <dave.hansen@intel.com>,
        Ravi Shankar <ravi.v.shankar@intel.com>,
        Ingo Molnar <mingo@kernel.org>
Subject: Re: [PATCH] x86/speculation: Support Enhanced IBRS on future CPUs
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On Tue, 24 Jul 2018, Sai Praneeth Prakhya wrote:

> From: Sai Praneeth <sai.praneeth.prakhya@intel.com>
> 
> Some future Intel processors may support "Enhanced IBRS" which is an
> "always on" mode i.e. IBRS bit in SPEC_CTRL MSR is enabled once and
> never disabled. According to specification[1], this should simplify
> software enabling and improve performance.

SHOULD is not really helpful. The question is whether it does improve
performance in practice or not. You really want to add numbers comparing
retpoutine and enhanced IBRS.

Thanks,

	tglx