Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp3912213imm; Mon, 30 Jul 2018 05:46:14 -0700 (PDT) X-Google-Smtp-Source: AAOMgpeWGt0F76Niu9niFKYPQXoie6+eHft5rLq4eGAxobUslauBBIEw6P90c2m0tsdaJDuJcL/g X-Received: by 2002:a62:ccd0:: with SMTP id j77-v6mr17724736pfk.22.1532954773936; Mon, 30 Jul 2018 05:46:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532954773; cv=none; d=google.com; s=arc-20160816; b=jRvqTYjIInv//2N631ikkqcL7SJ1PGhUGFRGVQiFqbui7wDg/ZmlcNwcA4mfVsuZFT DHwEBwebPJCwkkrvS+93pXHvErKwzNq6wm9/D3YTevsPpXtQVKOnso50drQ1XkK5X/oF U+lwb2LkbsFg1aPgiAQZCKoAGpu3iw6EKUy1rf6bdojRRnevLP0PTsjd8eCbV5N+Lpv2 w28qk3NPFft5Z3a5SiZPUMHo2wvsQbTA/uIq3CKDHOj1Qhusa8ubcWl4Ze9PR4Zf7+ya ED5Z1S2BG14fj1g0o/kbsDdOhZQm/H7KQoGvn1FZ4sElsJ2QOcM1iKXCPFJzblnl70BY 3MHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=K9GGogh4WamabCm1XAWLqqKBof0MnRqDQeRKGuE2gA4=; b=kBiVEUAECdw1fMxRrqFvIHcgAzHNnO5koggt3+tOLxNfPjdHT6UJfo3gwgXsyeDLvZ yJdt418MK6LOLqDW5gFXzl2tcbN9MYywCNqj8w07elpSkA3FCWBqPrOU8fsSghaTfdeq isIOVUxiGvrvoxzpYRTLnwtt4qYcoUuFrqwZY58yD+ADWlm9f0bvOSbvORBiY9cPQAw9 oWN+5SwS5BLWNoT9jZ5egly5SEYOnU8CWfYlNyG5sMUx/AJ50ENb6RJweyjTNeguzDDY OSJZ8Khy91evLGXDMzT9c01aoibHLdUFVZXR5sGHL7S5tj5z2AB5gu/O3aNaWVFdg33E L+oA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g6-v6si9624112plq.242.2018.07.30.05.45.59; Mon, 30 Jul 2018 05:46:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731799AbeG3OTS (ORCPT + 99 others); Mon, 30 Jul 2018 10:19:18 -0400 Received: from mail.bootlin.com ([62.4.15.54]:58453 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731447AbeG3OTR (ORCPT ); Mon, 30 Jul 2018 10:19:17 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id E5D752091A; Mon, 30 Jul 2018 14:44:25 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (AAubervilliers-681-1-89-120.w90-88.abo.wanadoo.fr [90.88.30.120]) by mail.bootlin.com (Postfix) with ESMTPSA id 8922D207AC; Mon, 30 Jul 2018 14:44:25 +0200 (CEST) From: Quentin Schulz To: alexandre.belloni@bootlin.com, ralf@linux-mips.org, paul.burton@mips.com, jhogan@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, davem@davemloft.net Cc: kishon@ti.com, andrew@lunn.ch, f.fainelli@gmail.com, linux-mips@linux-mips.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, allan.nielsen@microsemi.com, thomas.petazzoni@bootlin.com, Quentin Schulz Subject: [PATCH 07/10] dt-bindings: phy: add DT binding for Microsemi Ocelot SerDes muxing Date: Mon, 30 Jul 2018 14:43:52 +0200 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Quentin Schulz --- Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt | 42 +++++++- 1 file changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt diff --git a/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt b/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt new file mode 100644 index 0000000..25b102d --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt @@ -0,0 +1,42 @@ +Microsemi Ocelot SerDes muxing driver +------------------------------------- + +On Microsemi Ocelot, there is a handful of registers in HSIO address +space for setting up the SerDes to switch port muxing. + +A SerDes X can be "muxed" to work with switch port Y or Z for example. +One specific SerDes can also be used as a PCIe interface. + +Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one. + +There are two kinds of SerDes: SERDES1G supports 10/100Mbps in +half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports +10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode. + +Also, SERDES6G number (aka "macro") 0 is the only interface supporting +QSGMII. + +Required properties: + +- compatible: should be "mscc,vsc7514-serdes" +- #phy-cells : from the generic phy bindings, must be 3. The first number + defines the kind of Serdes (1 for SERDES1G_X, 6 for + SERDES6G_X), the second defines the macros in the specified + kind of Serdes (X for SERDES1G_X or SERDES6G_X) and the + last one defines the input port to use for a given SerDes + macro, + +Example: + + serdes: serdes { + compatible = "mscc,vsc7514-serdes"; + #phy-cells = <3>; + }; + + ethernet { + port1 { + phy-handle = <&phy_foo>; + /* Link SERDES1G_5 to port1 */ + phys = <&serdes 1 5 1>; + }; + }; -- git-series 0.9.1