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From:   Reinette Chatre <reinette.chatre@intel.com>
To:     tglx@linutronix.de, mingo@redhat.com, fenghua.yu@intel.com,
        tony.luck@intel.com, vikas.shivappa@linux.intel.com
Cc:     gavin.hindman@intel.com, jithu.joseph@intel.com,
        dave.hansen@intel.com, hpa@zytor.com, x86@kernel.org,
        linux-kernel@vger.kernel.org,
        Reinette Chatre <reinette.chatre@intel.com>
Subject: [PATCH 1/2] perf/x86: Expose PMC hardware reservation
Date:   Tue, 31 Jul 2018 12:38:28 -0700
Message-Id: <dcf5f19f0434261d4a475b47a965b2294fa069cd.1533064851.git.reinette.chatre@intel.com>
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References: <cover.1533064851.git.reinette.chatre@intel.com>
In-Reply-To: <cover.1533064851.git.reinette.chatre@intel.com>
References: <cover.1533064851.git.reinette.chatre@intel.com>
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When multiple users need to use performance counters a reservation
mechanism is required to ensure coordination. This reservation
mechanism already exists and any user can currently reserve/release
a single performance counter and/or its matching event configuration
via the exported symbols reserve_perfctr_nmi() and reserve_evntsel_nmi()
(and their matching release functions). These reservation functions
take as parameter a single performance counter or event configuration
register at a time and they are typically called in a loop where they
are called for every counter on the system.

The current users of these exported symbols are oprofile and the x86
events system that each use wrappers to these exported symbols as a way
to reserve the entire pmc system - calling a reserve of each counter
and its configuration registers.

A user wanting to use x86 PMC hardware can currently do so by duplicating
the x86 PMC hardware reservation by creating a new wrapper for the exported
reserve_perfctr_nmi() and reserve_evntsel_nmi() functions. This
duplication is not desirable and thus the current wrapping x86 pmc
reservation routine itself (reserve_pmc_hardware()) and matching
release function (release_pmc_hardware()) are exported for users needing
to coordinate use of PMC hardware.

Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
---
 arch/x86/events/core.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 5f4829f10129..e883a0a11f53 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -144,7 +144,7 @@ static DEFINE_MUTEX(pmc_reserve_mutex);
 
 #ifdef CONFIG_X86_LOCAL_APIC
 
-static bool reserve_pmc_hardware(void)
+bool reserve_pmc_hardware(void)
 {
 	int i;
 
@@ -173,7 +173,7 @@ static bool reserve_pmc_hardware(void)
 	return false;
 }
 
-static void release_pmc_hardware(void)
+void release_pmc_hardware(void)
 {
 	int i;
 
@@ -189,6 +189,8 @@ static bool reserve_pmc_hardware(void) { return true; }
 static void release_pmc_hardware(void) {}
 
 #endif
+EXPORT_SYMBOL(reserve_pmc_hardware);
+EXPORT_SYMBOL(release_pmc_hardware);
 
 static bool check_hw_exists(void)
 {
-- 
2.17.0