Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp525318imm; Wed, 1 Aug 2018 00:26:21 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfNoiOEos8nBd85aLvXd++k+g6898L0PEgYeleB3CeyAj4bUiise4k1Yyd0gxPIx189y59b X-Received: by 2002:a63:62c4:: with SMTP id w187-v6mr23342360pgb.55.1533108381435; Wed, 01 Aug 2018 00:26:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533108381; cv=none; d=google.com; s=arc-20160816; b=fIfznsBkWho34bwGKmW+3rLE8DPbYHUPHElTVweM4lTQ8bsaeUXhsPN34MDJzLe3C2 Vt+5y812I4fAqRy0LRzWdkd/KLu1N4Kaw87kW0Yhfga6WK1HNqsgHTJIWxdjzrB4NHlm QoWwWW2HgI/2ap3lq1JXtaDPAXLAoVti/peZAL/Q+NloqhUU86cwX8QZ5MNia5vkM9N8 RASLAUBJP8gtxyOx2Z19HtlOALVvbJI0o7Kv4HqSQkpvS9jrkOCZxwoZzV5PdcUMdtb0 fXhrB+YKGlgybM/5rqdwsCBJl9+Xvq2Q5RMYoHZxGjeHrjIhlGC+nm1GZxXscaI4pz1z StvQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:arc-authentication-results; bh=IwCOzaLiNnJRXGi9rh63bXhA5M6cb7tOlrjIxtZOZGU=; b=K7IL/osFSJj8nIDwL1uzkuvmwOmXD08SmJdFeePg37HAPVSrVJuHSR5SEHAFiFaOZo k4zGiqveYztE3sAYy5WIYc3grVfACsXNRwO8szq0LAXpWDnA3lM7PA/Uzb6sswBKwnII UZM1rET7DndKairmX3txC7h2MmxqFajUNukg3hxzoe/2f5AM/2/eB+1ZeuHtC4r4snsU keLmuj8gZGnJCjpR1/yUiqzHhZiJGPi12FJD25TB4ZjUPWzRqx3vnRHnBpCWTdaZmzQl qOPJbD8RJwiubPtZwf+/kqmXPdp7sSuH5nVu/pH5J4Na0GxKKtHKdp4pdj2p7lK4c8Z2 z+EA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v3-v6si14325183plo.208.2018.08.01.00.26.06; Wed, 01 Aug 2018 00:26:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733271AbeHAJJf (ORCPT + 99 others); Wed, 1 Aug 2018 05:09:35 -0400 Received: from verein.lst.de ([213.95.11.211]:32929 "EHLO newverein.lst.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732300AbeHAJJf (ORCPT ); Wed, 1 Aug 2018 05:09:35 -0400 Received: by newverein.lst.de (Postfix, from userid 2407) id 960C79ED64; Wed, 1 Aug 2018 09:29:47 +0200 (CEST) Date: Wed, 1 Aug 2018 09:29:47 +0200 From: Christoph Hellwig To: okaya@codeaurora.org Cc: Christoph Hellwig , Tony Luck , Fenghua Yu , Arnd Bergmann , linux-ia64@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, okaya@kernel.org Subject: Re: [PATCH] ia64: fix barrier placement for write* / dma mapping Message-ID: <20180801072947.GD20224@lst.de> References: <20180731172031.4447-1-hch@lst.de> <20180731172031.4447-2-hch@lst.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.17 (2007-11-01) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jul 31, 2018 at 11:41:23PM -0700, okaya@codeaurora.org wrote: > I asked this question to Tony Luck before. If I remember right, > his answer was: > > CPU guarantees outstanding writes to be flushed when a register write > instruction is executed and an additional barrier instruction is not > needed. That would be great. It still doesn't explain the barriers in the dma sync routines. Those have been there since the following commit in the history tree: commit 66b99421d118a5ddd98a72913670b0fcf0a38d45 Author: Andrew Morton Date: Sat Mar 13 17:05:37 2004 -0800 [PATCH] DMA: Fill gaping hole in DMA API interfaces. From: "David S. Miller" which in fact only added them for the HP zx1 platform, and doesn't contain any good explanation of why we need a barrier. So I guess the right answer might be to just remove these barriers without replacement.