Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp693749imm; Wed, 1 Aug 2018 03:51:11 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfDOsTJLhKFf5fDX11xl1C6SSctpMHsO3jc6hvpuQYGxgtDBPPq3uuTGlSM+qAZIpt6+ox0 X-Received: by 2002:a17:902:988a:: with SMTP id s10-v6mr22982352plp.200.1533120671330; Wed, 01 Aug 2018 03:51:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533120671; cv=none; d=google.com; s=arc-20160816; b=nr8Rz00euteBB6beo/1C9LSK4w++ieWUc49nbxv9r5jy9AqCtwpKQfMWPrih3xNUk6 mXoExpGh7+garZngOxlAaX4P8heXl+QT9cVo55SKH9TlQS+oOamZBXpwJjW6z8QtSBLn XRx+R2dgdSFBcy1AJ2T+l3y1iBguUN1o29DsqNTt4jE1Q2x8nCppoSJ9OD426kbf1nQ5 J6T5Lj6dzrsR8CdIuXahdyl5A6XdjM+ocMnMPR+cZlCdYcQYr8W6+EIAvI7sWPUBPRtY R4Ever4mm6DNL43tQweah7LIO7UgHdX+3h3xKM2i/DG9XKNFqamuF8V4+XnT9zi3qHjN xi2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=CTY7ZZNfRInUZyx7CQBgaKUPLUGj4uk9Fo7hpBuDvlg=; b=Pj+Q9FuATBqiO7o/Xnt81Gqi+K46E9x83rkQEPk2+fHrH18Mmv1o6TO2rBBu4hhI8b 6ZYQPAvoG+qk724E5XLEU94SIZhKBa5zwEnGjy1EnYIMt4mwCE9nkeEZRX+b8iIvfHD2 6zjPjQotUm92U6tvdzjpMboA7mk6KZmyx6nxQ9ZDZ6gzrc6d/TPUu1qav+OoYNQIbjH3 pbG0hyC+fMN6Qt66YPGhTIdHmpU5B1CSP8JoY4MHlEGUJmDQCnSSYtIGgbavqTaEZlNg jTex0r6fs945FtPpSapltEpZXEdFqBx+Sr2WUryz7C3lTKBO1MnS6Q6H/9bDKAxS+e3N sBEQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 200-v6si16402342pgf.378.2018.08.01.03.50.54; Wed, 01 Aug 2018 03:51:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388949AbeHAMfI (ORCPT + 99 others); Wed, 1 Aug 2018 08:35:08 -0400 Received: from nbd.name ([46.4.11.11]:55692 "EHLO nbd.name" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388688AbeHAMfH (ORCPT ); Wed, 1 Aug 2018 08:35:07 -0400 From: John Crispin To: Alban Bedel , Kate Stewart , Greg Kroah-Hartman Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, John Crispin , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH V2 1/3] dt-bindings: phy-qcom-ipq4019-usb: add binding document Date: Wed, 1 Aug 2018 12:49:39 +0200 Message-Id: <20180801104941.29432-2-john@phrozen.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180801104941.29432-1-john@phrozen.org> References: <20180801104941.29432-1-john@phrozen.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds the binding documentation for the HS/SS USB PHY found inside Qualcomm Dakota SoCs. Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: John Crispin --- .../bindings/phy/phy-qcom-ipq4019-usb.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-qcom-ipq4019-usb.txt diff --git a/Documentation/devicetree/bindings/phy/phy-qcom-ipq4019-usb.txt b/Documentation/devicetree/bindings/phy/phy-qcom-ipq4019-usb.txt new file mode 100644 index 000000000000..320a596c45b4 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-qcom-ipq4019-usb.txt @@ -0,0 +1,21 @@ +Qualcom Dakota HS/SS USB PHY + +Required properties: + - compatible: "qcom,ipq4019-usb-ss-phy", + "qcom,ipq4019-usb-hs-phy" + - reg: offset and length of the registers + - #phy-cells: should be 0 + - resets: the reset controllers as listed below + - reset-names: the names of the reset controllers + "por" - the POR reset line for SS and HS phys + "srif" - the SRIF reset line for HS phys +Example: + +usb-phy@a8000 { + compatible = "qcom,ipq4019-usb-hs-phy"; + phy-cells = <0>; + reg = <0xa8000 0x40>; + resets = <&gcc USB2_HSPHY_POR_ARES>, + <&gcc USB2_HSPHY_S_ARES>; + reset-names = "por", "srif"; +}; -- 2.11.0