Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp1063224imm;
        Wed, 1 Aug 2018 09:35:34 -0700 (PDT)
X-Google-Smtp-Source: AAOMgpfmBVDkhmqZQLbuoM3YJ+RIAHWtAd/3efSSKGuCilJHv/x/Mdvvi0RcD6Zq8F2zz8kj0GvB
X-Received: by 2002:a17:902:aa87:: with SMTP id d7-v6mr25319632plr.215.1533141334607;
        Wed, 01 Aug 2018 09:35:34 -0700 (PDT)
ARC-Seal: i=1; a=rsa-sha256; t=1533141334; cv=none;
        d=google.com; s=arc-20160816;
        b=KXXq3EqjG1KH7FHVvL4LqwoRxWFc9QD96f2+BIZFa2SWFR28qWNIJTuLVA25qEmxNE
         WLB9RCjKSI7SW76i1FraYc2o1gFjlxzIDk3a2F6/QId0CEQPXgbT+oy2728fFmvqoreT
         FvMhjOruPRo/8CZIa36xOD+GbzUDArF4epbYXAJR/l4Ls21eRsVe2Rq9X3d81usZ1o0w
         PeXUjzad0nnOh8G3n4C3U7xuIIcqzk13+VBuHQHySjS4Y8OTgK4QDwfjIMuaGrzq3CJa
         +odXTTiYTCqs47zgRgr/eEHOaHpfs/RuC6xNqbx5CTe7coWEqj1Z2NadCTibpTb1tJ8x
         Ceug==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=list-id:precedence:sender:mime-version:references:in-reply-to
         :message-id:date:subject:cc:to:from:arc-authentication-results;
        bh=GGWxqW9w398VraMjpoR/nTvA3+4uolwZEHqIuJhQbSY=;
        b=swCgoEEL4g386sb+iLpuViTDP/LPNelmZtwk4P7sVs0s4hlolVFDiwk7AaGUnP1P2T
         6bwft3BHPEU5G4jSa4CFjeoo4y1uKBKSZHpyLnk9xrVv2fe1Va02Os/iZ4xeZ78Uq1BK
         4nyKaZH2LXBgG4hKUDEPo0PlGJMvkmEwZT/Iqm8+CQU8Ohpe9aP/+z+Qy0Er+2Ox0G8C
         AmrjOtDftEeHxYkmBGEH80Efixdze1IGWA4zCxbwhlLMqBHt0u0NGlgiSvI/Nm5P3gZr
         sK21L5sPamqhHn7E15/EV0DaEDAUlXzolF/8d9W3RhMkGyAbYmgqFUlBJJPxI3DftkzW
         NAMw==
ARC-Authentication-Results: i=1; mx.google.com;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67])
        by mx.google.com with ESMTP id az7-v6si14653321plb.267.2018.08.01.09.35.19;
        Wed, 01 Aug 2018 09:35:34 -0700 (PDT)
Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Authentication-Results: mx.google.com;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S2403885AbeHASUk (ORCPT <rfc822;krseo358@gmail.com> + 99 others);
        Wed, 1 Aug 2018 14:20:40 -0400
Received: from hqemgate15.nvidia.com ([216.228.121.64]:3064 "EHLO
        hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S2403845AbeHASUj (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Wed, 1 Aug 2018 14:20:39 -0400
Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com (using TLS: TLSv1, AES128-SHA)
        id <B5b61e0fa0007>; Wed, 01 Aug 2018 09:34:02 -0700
Received: from HQMAIL107.nvidia.com ([172.20.161.6])
  by hqpgpgate101.nvidia.com (PGP Universal service);
  Wed, 01 Aug 2018 09:34:07 -0700
X-PGP-Universal: processed;
        by hqpgpgate101.nvidia.com on Wed, 01 Aug 2018 09:34:07 -0700
Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL107.nvidia.com
 (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 1 Aug
 2018 16:34:07 +0000
Received: from HQMAIL103.nvidia.com (172.20.187.11) by HQMAIL111.nvidia.com
 (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 1 Aug
 2018 16:34:07 +0000
Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL103.nvidia.com
 (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend
 Transport; Wed, 1 Aug 2018 16:34:07 +0000
Received: from dhcp-10-21-25-168.Nvidia.com (Not Verified[10.21.25.201]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7,5,8,10121)
        id <B5b61e0fc0001>; Wed, 01 Aug 2018 09:34:07 -0700
From:   Aapo Vienamo <avienamo@nvidia.com>
To:     Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Thierry Reding <thierry.reding@gmail.com>,
        Jonathan Hunter <jonathanh@nvidia.com>,
        Ulf Hansson <ulf.hansson@linaro.org>,
        Adrian Hunter <adrian.hunter@intel.com>,
        Mikko Perttunen <mperttunen@nvidia.com>,
        "Stefan Agner" <stefan@agner.ch>
CC:     <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>,
        Aapo Vienamo <avienamo@nvidia.com>
Subject: [PATCH 28/40] mmc: tegra: Enable UHS and HS200 modes for Tegra210
Date:   Wed, 1 Aug 2018 19:32:18 +0300
Message-ID: <1533141150-10511-29-git-send-email-avienamo@nvidia.com>
X-Mailer: git-send-email 2.7.4
In-Reply-To: <1533141150-10511-1-git-send-email-avienamo@nvidia.com>
References: <1533141150-10511-1-git-send-email-avienamo@nvidia.com>
X-NVConfidentiality: public
MIME-Version: 1.0
Content-Type: text/plain
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Set nvquirks to enable higher speed modes.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
---
 drivers/mmc/host/sdhci-tegra.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 2e07dcd..03a6bf7 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -843,7 +843,9 @@ static const struct sdhci_tegra_soc_data soc_data_tegra210 = {
 	.pdata = &sdhci_tegra210_pdata,
 	.nvquirks = NVQUIRK_NEEDS_PAD_CONTROL |
 		    NVQUIRK_HAS_PADCALIB |
-		    NVQUIRK_DIS_CARD_CLK_CONFIG_TAP,
+		    NVQUIRK_DIS_CARD_CLK_CONFIG_TAP |
+		    NVQUIRK_ENABLE_SDR50 |
+		    NVQUIRK_ENABLE_SDR104,
 };
 
 static const struct sdhci_pltfm_data sdhci_tegra186_pdata = {
-- 
2.7.4