Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp1174815imm; Wed, 1 Aug 2018 11:25:45 -0700 (PDT) X-Google-Smtp-Source: AAOMgpc6dy7axVqP8kdT7gWkLLv+9GMjtDJUow1hYAMqq8+zss2zpS4dQA9KjjDTaeFokJkhe//p X-Received: by 2002:a62:ac12:: with SMTP id v18-v6mr27601220pfe.126.1533147945074; Wed, 01 Aug 2018 11:25:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533147945; cv=none; d=google.com; s=arc-20160816; b=HNPS4eF4nmcHIg1uEYTNdSicYMZeaM+wDhkoCWbhlF4TrxeL08AzNFD0ijFGU4i77t kvTrqaXx77IiOO/14EuZVI7l1OtN6M1KgHxF9OhUYLu2qhqrq1YHAMO+5mfoCiHQCoGt ARg0Cbj4/5tkBZTLW/hO6hoLQLQrH5I7hJ8N7bEqjDkcsRf36vEBXaMwG/flKWdO1au3 5Tmod8aW9d/yCEwzoOs6wdVkD4AKFZgs9wCaQcTi9IZ57LTd3SOWKBaexlJm8gdkWJBl y17P5Cz1rbEI+jJY+fcGDbAaKtNEsSwVpVHK9lYf1VxXO0LDPa0kvojGuHdm738HqCe+ /KNw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :references:in-reply-to:mime-version:dkim-signature :arc-authentication-results; bh=Fvh2H4JSxbPu2GIVWeEdWu381yxmbCu0qRDCdjiFp3g=; b=hbbYuBNahbngBUWN3U0UH+EgzIVH9tMUGbY6Uz5dMbwwK+zGxLu/CW/v+oVQWSaewz jd63ASl3tad+QLw3hLqfDbGde0uxsDbgH9mDEq6drZruWyQE14wCGGk6IWCeWDVZgOkR 6971FtSwh/fXqe/1b6P8IowdN4F1ziIUUCeGg24IMAxi4vR6+yfupz4vX30SJ3kO9i8u C1JBbheKvwyUGVvTY3LZY9gCa8SZ83zFQFvVYGn9R9jhqoSxvGGJgcXc2TxD7iruIzYm N4C64oWT0lsA0elqHY3HOkrpprr3wHZTuqB5UCtHLKBh7viKC0dN1JJHl/PCgJ/TLVgG DEMg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=f8LVhPgn; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x69-v6si16724627pgd.635.2018.08.01.11.25.30; Wed, 01 Aug 2018 11:25:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=f8LVhPgn; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733068AbeHAULH (ORCPT + 99 others); Wed, 1 Aug 2018 16:11:07 -0400 Received: from mail-ed1-f67.google.com ([209.85.208.67]:42373 "EHLO mail-ed1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730449AbeHAULG (ORCPT ); Wed, 1 Aug 2018 16:11:06 -0400 Received: by mail-ed1-f67.google.com with SMTP id r4-v6so2686edp.9 for ; Wed, 01 Aug 2018 11:24:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=Fvh2H4JSxbPu2GIVWeEdWu381yxmbCu0qRDCdjiFp3g=; b=f8LVhPgnRIyxFKXTx4I5bvZknoGWuIoSnXkAhJwTbXulP2rFxCRsSl0WOfcJduEbY9 U3GQrZmV7JbrXd2tnA4WCbkjm7nDea93/iPskG/L4xrre5QaChY8+FPLSLpnJlgamOtY 93kPloyv31OD/TJYVWAggJY3qOZQwXVzjtyYvYq4CSlRHC+DombQCpi4RhnDNdscac7T Shv0fuu2Rch1PlsdFzaHrPmiM5S04JCVL4K2J3JPNwWW1tzUzcvP2w0fuLVsYJTEl1Z7 Qj2t/itqLV3YeJS9hD6ZJXnBUD7JUJtqmsvvdEefbMSONCCsLTzYcevQgIG77pzBTyKp CCqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=Fvh2H4JSxbPu2GIVWeEdWu381yxmbCu0qRDCdjiFp3g=; b=WZa47o32LettL1b6U5PbpbmMmjCDzKhfmn5t38jG1kCn6/ORU9TjuzTs2Uqt6le0xQ uvapdqDKKcBNA1B9lkizaz4lbvdq8EZy9ymDGbjeQdjyB2a6NzyhN84JdDZ4j+vJlPKO mqu01cNj3q+T+FRi/8MmVInCMuROH+2M2Nz1iGz9VEXzggwka6FT8lM7DQQDj9+6Cdw3 h7P9kVb9c8ZnDKWTzsO552YrMHyyTv5reID0cgragC+b1qwxTvQKMhzRMP1mf/CM4TJu 26WZ7cRKskH5eBHhRMVv1AnEL+FZcAZPYGaBOixVfufe0E9k0zfYopUFcbFpYh61BHyH ukWQ== X-Gm-Message-State: AOUpUlHPdCTGoWk8gjE3SnXn7FCgvHBuVLIeDPetQjHn+7/rS1m1aDxI /ZCktbQj+tckebQAl+4D6x3YVxK4hs8= X-Received: by 2002:aa7:d993:: with SMTP id u19-v6mr4871034eds.125.1533147845171; Wed, 01 Aug 2018 11:24:05 -0700 (PDT) Received: from mail-wm0-f48.google.com (mail-wm0-f48.google.com. [74.125.82.48]) by smtp.gmail.com with ESMTPSA id t44-v6sm13245edh.18.2018.08.01.11.24.03 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 01 Aug 2018 11:24:04 -0700 (PDT) Received: by mail-wm0-f48.google.com with SMTP id c14-v6so34170wmb.4 for ; Wed, 01 Aug 2018 11:24:03 -0700 (PDT) X-Received: by 2002:a1c:ee15:: with SMTP id m21-v6mr3556754wmh.112.1533147843693; Wed, 01 Aug 2018 11:24:03 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a1c:3644:0:0:0:0:0 with HTTP; Wed, 1 Aug 2018 11:23:43 -0700 (PDT) In-Reply-To: References: <1530073346-5341-1-git-send-email-alankao@andestech.com> From: Andrew Waterman Date: Wed, 1 Aug 2018 11:23:43 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2] riscv: Add support to no-FPU systems To: Palmer Dabbelt Cc: alankao@andestech.com, Albert Ou , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Arnd Bergmann , Christoph Hellwig , Darius Rad , greentime@andestech.com, Zong Li Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Aug 1, 2018 at 10:55 AM, Palmer Dabbelt wrote: > On Tue, 26 Jun 2018 21:22:26 PDT (-0700), alankao@andestech.com wrote: >> >> This patch adds an option, CONFIG_FPU, to enable/disable floating >> procedures. Also, some style issues are fixed. >> >> Signed-off-by: Alan Kao >> Cc: Greentime Hu >> Cc: Zong Li >> --- >> arch/riscv/Kconfig | 9 ++++ >> arch/riscv/Makefile | 19 +++---- >> arch/riscv/include/asm/switch_to.h | 6 +++ >> arch/riscv/kernel/entry.S | 3 +- >> arch/riscv/kernel/process.c | 7 ++- >> arch/riscv/kernel/signal.c | 82 +++++++++++++++++++++--------- >> 6 files changed, 90 insertions(+), 36 deletions(-) >> >> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig >> index 6debcc4afc72..6069597ba73f 100644 >> --- a/arch/riscv/Kconfig >> +++ b/arch/riscv/Kconfig >> @@ -232,6 +232,15 @@ config RISCV_BASE_PMU >> >> endmenu >> >> +config FPU >> + bool "FPU support" >> + default y >> + help >> + Say N here if you want to disable all floating-point related >> procedure >> + in the kernel. >> + >> + If you don't know what to do here, say Y. >> + >> endmenu > > > Sorry for letting this slide for a bit. While I'm not opposed to a solution > that requires a FPU Kconfig option, it'd be a bit better if we could detect > this at boot time. I think this should be possible because at one point > this actually worked and we could boot the same kernel on FPU and no-FPU > systems. I believe it would suffice to have start_thread set sstatus.FS to OFF for no-FPU systems (vs. INITIAL for systems with FPU). The ISA string in the devicetree should indicate whether F/D extensions are present. That said, it makes sense to me to additionally provide the Kconfig option. This would elide the sstatus.SD check for no-FPU systems, shaving a couple instructions off the context-switch path. It would also enable mimicking the behavior of a no-FPU system even when the FPU is present. > > If that's not possible then we'll have to take something like this. There > were some comments on this v2 but I don't see a v3, did I miss one?