Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp1432931imm; Wed, 1 Aug 2018 16:10:50 -0700 (PDT) X-Google-Smtp-Source: AAOMgpeqF/PCcBiqYkO/iaWzVZGXAYBnA06ifkIgGnoPFwjcc1voDTYxLYkZCmxtpIt7nTDUxF8w X-Received: by 2002:a63:d916:: with SMTP id r22-v6mr279575pgg.381.1533165050722; Wed, 01 Aug 2018 16:10:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533165050; cv=none; d=google.com; s=arc-20160816; b=qNVaCUh/ICEHZKYiNSpEh9h7AExZUBZpiAmtp6dudP3T5EoH2Nxdvf0EUyRyylNJ4v hdlt759kg36W9JXCb66+5bR/ndEWrSzkKJEULvxaxEl7USw+mzNceFOdliIgcB8aXjZ/ Vu4I+5OEsKcmriwoxwX91XTqq0U+6lXRAi8fL1Rdh0mTfUHYjbElpxCXwbKxSgKInD9c tnFII1x7Vuh7tEd1CB7W8yfBiqOKjlhciI70gXZ/AVAJDoLEVPIejyIGaCLSTEs6BB9o QZ9Sols05X/cZijRseQw7D91vjBP04guwBxFXS7fxhQsGHAG4qAfgIREhLUiOXx6/TQy ZjEQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:arc-authentication-results; bh=nH4wy4YcvA7KZEu4bmgLggLWeM3yvGsxmbcnWUIdNC0=; b=rEImmVO02pIhCw5YW7OqSQhv1pLvYJcSZsn1yvMnQtjsUjTJ3b0ubzv19ztGDg6NJ7 BRRSGJfMn12gSIMSjPiqz1TCFNIFnW54oX6Q/lMekpdrdqGQeDdbAcj5+wbkQLo8zgNU 2pNueFV+o63Pi2uymKBrlSg8XfDavgFq+nKf2GiA0MGRnBRaPZZkvRkwm+SDFNZPj94F LGRXQvJM0WujfBkm1a2Mcy1yYRjfZp1vrLd8g4qr+Qi1YHe8EBvmAJjGRHa4VZVUlAgx iNRey7elBDy+JKeWASjVeaeDL3FWkYEjUdk5+J7S37T8mw1N1UEneuzzqd4sNqyS34zg WJmA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d22-v6si123824plr.318.2018.08.01.16.10.35; Wed, 01 Aug 2018 16:10:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732261AbeHBA5z (ORCPT + 99 others); Wed, 1 Aug 2018 20:57:55 -0400 Received: from exmail.andestech.com ([59.124.169.137]:54212 "EHLO ATCSQR.andestech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731914AbeHBA5y (ORCPT ); Wed, 1 Aug 2018 20:57:54 -0400 Received: from mail.andestech.com (atcpcs16.andestech.com [10.0.1.222]) by ATCSQR.andestech.com with ESMTP id w71N9EUL062542; Thu, 2 Aug 2018 07:09:14 +0800 (GMT-8) (envelope-from alankao@andestech.com) Received: from andestech.com (10.0.1.85) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.123.3; Thu, 2 Aug 2018 07:09:37 +0800 Date: Thu, 2 Aug 2018 07:09:38 +0800 From: Alan Kao To: Palmer Dabbelt CC: , , , Arnd Bergmann , "Christoph Hellwig" , Andrew Waterman , Darius Rad , , Subject: Re: [PATCH v2] riscv: Add support to no-FPU systems Message-ID: <20180801230936.GA19815@andestech.com> References: <1530073346-5341-1-git-send-email-alankao@andestech.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) X-Originating-IP: [10.0.1.85] X-DNSRBL: X-MAIL: ATCSQR.andestech.com w71N9EUL062542 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Aug 01, 2018 at 10:55:28AM -0700, Palmer Dabbelt wrote: > On Tue, 26 Jun 2018 21:22:26 PDT (-0700), alankao@andestech.com wrote: > >This patch adds an option, CONFIG_FPU, to enable/disable floating > >procedures. Also, some style issues are fixed. > > > >Signed-off-by: Alan Kao > >Cc: Greentime Hu > >Cc: Zong Li > >--- > > arch/riscv/Kconfig | 9 ++++ > > arch/riscv/Makefile | 19 +++---- > > arch/riscv/include/asm/switch_to.h | 6 +++ > > arch/riscv/kernel/entry.S | 3 +- > > arch/riscv/kernel/process.c | 7 ++- > > arch/riscv/kernel/signal.c | 82 +++++++++++++++++++++--------- > > 6 files changed, 90 insertions(+), 36 deletions(-) > > > >diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > >index 6debcc4afc72..6069597ba73f 100644 > >--- a/arch/riscv/Kconfig > >+++ b/arch/riscv/Kconfig > >@@ -232,6 +232,15 @@ config RISCV_BASE_PMU > > > > endmenu > > > >+config FPU > >+ bool "FPU support" > >+ default y > >+ help > >+ Say N here if you want to disable all floating-point related procedure > >+ in the kernel. > >+ > >+ If you don't know what to do here, say Y. > >+ > > endmenu > > Sorry for letting this slide for a bit. While I'm not opposed to a solution > that requires a FPU Kconfig option, it'd be a bit better if we could detect > this at boot time. I think this should be possible because at one point > this actually worked and we could boot the same kernel on FPU and no-FPU > systems. > > If that's not possible then we'll have to take something like this. There > were some comments on this v2 but I don't see a v3, did I miss one? I have been refatoring this into a patchset containing logically indenpendent patches. It will be sent soon after some sanity checks.