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[209.132.180.67]) by mx.google.com with ESMTP id x63-v6si2199855pfb.299.2018.08.02.07.11.33; Thu, 02 Aug 2018 07:11:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=foRxSGO0; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732572AbeHBQBs (ORCPT + 99 others); Thu, 2 Aug 2018 12:01:48 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:35596 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732231AbeHBQBr (ORCPT ); Thu, 2 Aug 2018 12:01:47 -0400 Received: by mail-wm0-f66.google.com with SMTP id o18-v6so2756537wmc.0; Thu, 02 Aug 2018 07:10:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AQDlM29x6ygdS9Pi8RFktUUJqAuke0GTAHr2//YIM4A=; b=foRxSGO0M7a6KElsDaOL9oUpKUQtz4wSDl+JmEJTAXjHbI3yL0Ngofv5XqHHrjDg2G eKdF7Nbjl8qrlV7Mqy9jDgeY6agxQTj1JXtrmrYFgvHku/XiF430bfBVUj+s9ezgmlJZ pTGFbTp+rKsmnJ0j0Sqd+gDGAj2/EoD2DEB67j54KCih8VtfFzs3TaRStZEZ/UqlMCOQ 4pxBvlM0cVGgkg2oujnI8aD3TPrVkvYe+S9UdtNhdJdkGumeV7L5QH50BN57Lfju5edr 1cBvVH/1LZSPwqOCfmAbmfngETZQQxosTJfyRQRsuDhshTuRC3EQBN+tOgU156Vg8r4Y BDWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=AQDlM29x6ygdS9Pi8RFktUUJqAuke0GTAHr2//YIM4A=; b=DsHt1cOvRVvg7nklawP5RooynsD42yL/XeOBr8Uq7RjxuBwB5GiSoQCypKf4Poi5IQ rPkXM5YoWWFOkSeE/ZY/cLHSRXi5gn6ZAjSDj9NeccZ7cNFwkVdkXSt7b5rHEX1kUb+Q 26HwrpOXTmeEokXyxJiA9vphj/OW/Np+fw0SRdT/X92VETB7BjKV9uaq7k73CI/MTAaS dALgMTZ2PqnwfzvOVGxo2326kr+PprxPnYjme1TW2u1LQ5pG8NacV6vTNgcL0B/F6xz/ G3659WlwZ8l0ruUYR06uzhxenns9dXkoAWBVybKE4mIWyCqfk+u+8WVMyDDFfZfbaCaZ RgfA== X-Gm-Message-State: AOUpUlEGShkBqgn0UKrk7dzgIHqQ9RmrfoWz5FPiPH5MN2EowCH8UzyT R0F0cHx/+4gH+OgQyhdaLZxRcbYQDuw= X-Received: by 2002:a1c:6c14:: with SMTP id h20-v6mr2218384wmc.138.1533219023425; Thu, 02 Aug 2018 07:10:23 -0700 (PDT) Received: from NewMoon.iit.local ([90.147.180.254]) by smtp.gmail.com with ESMTPSA id d78-v6sm3392310wma.37.2018.08.02.07.10.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Aug 2018 07:10:22 -0700 (PDT) From: Andrea Merello To: vkoul@kernel.org, dan.j.williams@intel.com, michal.simek@xilinx.com, appana.durga.rao@xilinx.com, dmaengine@vger.kernel.org Cc: v4-000linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, radhey.shyam.pandey@xilinx.com, Andrea Merello Subject: [PATCH v4 5/7] dmaengine: xilinx_dma: autodetect whether the HW supports scatter-gather Date: Thu, 2 Aug 2018 16:10:10 +0200 Message-Id: <20180802141012.19970-5-andrea.merello@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180802141012.19970-1-andrea.merello@gmail.com> References: <20180802141012.19970-1-andrea.merello@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The AXIDMA and CDMA HW can be either direct-access or scatter-gather version. These are SW incompatible. The driver can handle both versions: a DT property was used to tell the driver whether to assume the HW is in scatter-gather mode. This patch makes the driver to autodetect this information. The DT property is not required anymore. No changes for VDMA. Cc: Rob Herring Cc: Mark Rutland Cc: devicetree@vger.kernel.org Cc: Radhey Shyam Pandey Signed-off-by: Andrea Merello Reviewed-by: Radhey Shyam Pandey --- Changes in v2: - autodetect only in !VDMA case Changes in v3: - cc DT maintainers/ML Changes in v4: - fix typos in commit message --- drivers/dma/xilinx/xilinx_dma.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c index b17f24e4ec35..78d0f2f8225e 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c @@ -86,6 +86,7 @@ #define XILINX_DMA_DMASR_DMA_DEC_ERR BIT(6) #define XILINX_DMA_DMASR_DMA_SLAVE_ERR BIT(5) #define XILINX_DMA_DMASR_DMA_INT_ERR BIT(4) +#define XILINX_DMA_DMASR_SG_MASK BIT(3) #define XILINX_DMA_DMASR_IDLE BIT(1) #define XILINX_DMA_DMASR_HALTED BIT(0) #define XILINX_DMA_DMASR_DELAY_MASK GENMASK(31, 24) @@ -407,7 +408,6 @@ struct xilinx_dma_config { * @dev: Device Structure * @common: DMA device structure * @chan: Driver specific DMA channel - * @has_sg: Specifies whether Scatter-Gather is present or not * @mcdma: Specifies whether Multi-Channel is present or not * @flush_on_fsync: Flush on frame sync * @ext_addr: Indicates 64 bit addressing is supported by dma device @@ -427,7 +427,6 @@ struct xilinx_dma_device { struct device *dev; struct dma_device common; struct xilinx_dma_chan *chan[XILINX_DMA_MAX_CHANS_PER_DEVICE]; - bool has_sg; bool mcdma; u32 flush_on_fsync; bool ext_addr; @@ -2400,7 +2399,6 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, chan->dev = xdev->dev; chan->xdev = xdev; - chan->has_sg = xdev->has_sg; chan->desc_pendingcount = 0x0; chan->ext_addr = xdev->ext_addr; /* This variable ensures that descriptors are not @@ -2493,6 +2491,15 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, chan->stop_transfer = xilinx_dma_stop_transfer; } + /* check if SG is enabled (only for AXIDMA and CDMA) */ + if (xdev->dma_config->dmatype != XDMA_TYPE_VDMA) { + if (dma_ctrl_read(chan, XILINX_DMA_REG_DMASR) & + XILINX_DMA_DMASR_SG_MASK) + chan->has_sg = true; + dev_dbg(chan->dev, "ch %d: SG %s\n", chan->id, + chan->has_sg ? "enabled" : "disabled"); + } + /* Initialize the tasklet */ tasklet_init(&chan->tasklet, xilinx_dma_do_tasklet, (unsigned long)chan); @@ -2631,7 +2638,6 @@ static int xilinx_dma_probe(struct platform_device *pdev) return PTR_ERR(xdev->regs); /* Retrieve the DMA engine properties from the device tree */ - xdev->has_sg = of_property_read_bool(node, "xlnx,include-sg"); xdev->max_buffer_len = GENMASK(XILINX_DMA_MAX_TRANS_LEN_MAX - 1, 0); if (xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) { -- 2.17.1