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Date:   Thu, 2 Aug 2018 18:18:23 +0200
From:   Peter Zijlstra <peterz@infradead.org>
To:     Reinette Chatre <reinette.chatre@intel.com>
Cc:     tglx@linutronix.de, mingo@redhat.com, fenghua.yu@intel.com,
        tony.luck@intel.com, vikas.shivappa@linux.intel.com,
        gavin.hindman@intel.com, jithu.joseph@intel.com,
        dave.hansen@intel.com, hpa@zytor.com, x86@kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination
 with perf
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References: <cover.1533064851.git.reinette.chatre@intel.com>
 <20180802123923.GJ2530@hirez.programming.kicks-ass.net>
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On Thu, Aug 02, 2018 at 09:14:10AM -0700, Reinette Chatre wrote:

> The current implementation does not coordinate with perf and this is
> what I am trying to fix in this series.
> 
> I do respect your NAK but it is not clear to me how to proceed after
> obtaining it. Could you please elaborate on what you would prefer as a
> solution to ensure accurate measurement of cache-locked data that is
> better integrated?

We have an in-kernel interface to perf, use that if you want access to
the PMU. You will not directly stomp on PMU registers.