Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp328110imm; Thu, 2 Aug 2018 20:14:26 -0700 (PDT) X-Google-Smtp-Source: AAOMgpf4PfKQGowRXTRoEVU2zmpF0vo5vIpgl+oyf0kFKOtmPXOG1Z2+OdApCT+dEjDOZG24LPDI X-Received: by 2002:a17:902:b608:: with SMTP id b8-v6mr1869427pls.312.1533266066841; Thu, 02 Aug 2018 20:14:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533266066; cv=none; d=google.com; s=arc-20160816; b=JSM2AFYF1jmW3X78grwpeyO9g/GDx23fCS6+GXFfMl163yoAlH5+F4LGeVrVVe+Opu Rgpea4IgrXzErCNirUYufpg3KcWPMnOMZlJ3B+YcxxOHtesi/ucxKL5w/7cOspkxePOy gOrLR4TDmKhqRcM/YOwHX/xPo5MO9dul3NcUMyHb8/j+ne+I8PnUNDImqgVqbO919DMw WQfQtJFgGK/3olPFPe8/wP1vgWa3KTubz5yqbkN2/3nemFAoJYnmPM+rNIk5OHgJNX9i RKJjvVD0znKBj5qsk9X4Cxxu82NwMRab5mwyZ9QmmeRN34GgKXQjcM5lefMrvDLZ29Yc byyw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=BK4dsJujCoOylscYyCQZMJrUX8ccUpf/jXsxN5lBVp0=; b=XApMcMXccWjGMEPy5nyyaJiqMKVHWGtjA5/uLteVqb8GQzaIUeT3JoUEgOuHXuhlq7 vHgljzQuLseUr6B98BgFul1oWPtPBew2aB2Jkf/t+KOOjrOoX4xyAqa2e8gWa4b7hHD8 8Ktt7xQ2/uqBKNX0cxzjDb+ysZWzpN4zOdlO8PSAxK+Ln0nQ2ExrNAJZN7Joq0R55GAO XI9OBHS9CvootQvfhuEdt4sCbin/ZCzTywhSJB4svu+bgqEGAWJ0QJFxm/7iI7fTHQrG 5/tfuhxpVh3svtLs75VM6fxhoJaaiRLHaAaDeLgWZ7RR+Q9ybO+N8F0nPU7XfooAZ+oS zSuw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b35-v6si2747742plh.308.2018.08.02.20.14.12; Thu, 02 Aug 2018 20:14:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727514AbeHCFFg (ORCPT + 99 others); Fri, 3 Aug 2018 01:05:36 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:37586 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726571AbeHCFFe (ORCPT ); Fri, 3 Aug 2018 01:05:34 -0400 X-UUID: 0bd058e966244427be84afcf4df70254-20180803 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1987566842; Fri, 03 Aug 2018 11:11:14 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Fri, 3 Aug 2018 11:11:11 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Fri, 3 Aug 2018 11:11:11 +0800 From: Stu Hsieh To: CK Hu , Philipp Zabel CC: David Airlie , Matthias Brugger , , , , , , Stu Hsieh Subject: [PATCH v2 04/15] drm/mediatek: add connection from RDMA2 to DSI0 Date: Fri, 3 Aug 2018 11:10:57 +0800 Message-ID: <1533265868-28110-5-git-send-email-stu.hsieh@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1533265868-28110-1-git-send-email-stu.hsieh@mediatek.com> References: <1533265868-28110-1-git-send-email-stu.hsieh@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch add connection from RDMA2 to DSI0 Signed-off-by: Stu Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c index 31189fad8d4e..3239f22785fd 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c @@ -125,6 +125,7 @@ #define DPI1_SEL_IN_RDMA1 (0x1 << 8) #define DPI1_SEL_IN_RDMA2 (0x3 << 8) #define DSI0_SEL_IN_RDMA1 0x1 +#define DSI0_SEL_IN_RDMA2 0x4 #define DSI1_SEL_IN_RDMA1 0x1 #define DSI1_SEL_IN_RDMA2 0x4 #define DSI2_SEL_IN_RDMA1 (0x1 << 16) @@ -309,6 +310,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur, } else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DPI1) { *addr = DISP_REG_CONFIG_DPI_SEL_IN; value = DPI1_SEL_IN_RDMA2; + } else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DSI0) { + *addr = DISP_REG_CONFIG_DSIE_SEL_IN; + value = DSI0_SEL_IN_RDMA2; } else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DSI1) { *addr = DISP_REG_CONFIG_DSIE_SEL_IN; value = DSI1_SEL_IN_RDMA2; -- 2.12.5.2.gbdf23ab