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[209.132.180.67]) by mx.google.com with ESMTP id f132-v6si7667644pgc.20.2018.08.04.06.30.04; Sat, 04 Aug 2018 06:30:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727980AbeHDP3z (ORCPT + 99 others); Sat, 4 Aug 2018 11:29:55 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:47880 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726753AbeHDP3z (ORCPT ); Sat, 4 Aug 2018 11:29:55 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id BF4138197021; Sat, 4 Aug 2018 13:29:11 +0000 (UTC) Received: from file01.intranet.prod.int.rdu2.redhat.com (file01.intranet.prod.int.rdu2.redhat.com [10.11.5.7]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 52F577C39; Sat, 4 Aug 2018 13:29:11 +0000 (UTC) Received: from file01.intranet.prod.int.rdu2.redhat.com (localhost [127.0.0.1]) by file01.intranet.prod.int.rdu2.redhat.com (8.14.4/8.14.4) with ESMTP id w74DTBhC025452; Sat, 4 Aug 2018 09:29:11 -0400 Received: from localhost (mpatocka@localhost) by file01.intranet.prod.int.rdu2.redhat.com (8.14.4/8.14.4/Submit) with ESMTP id w74DTAZW025448; Sat, 4 Aug 2018 09:29:10 -0400 X-Authentication-Warning: file01.intranet.prod.int.rdu2.redhat.com: mpatocka owned process doing -bs Date: Sat, 4 Aug 2018 09:29:10 -0400 (EDT) From: Mikulas Patocka X-X-Sender: mpatocka@file01.intranet.prod.int.rdu2.redhat.com To: Matt Sealey cc: Ard Biesheuvel , Will Deacon , Jingoo Han , Joao Pinto , Thomas Petazzoni , Catalin Marinas , Russell King , Linux Kernel Mailing List , linux-arm-kernel , linux-pci Subject: Re: framebuffer corruption due to overlapping stp instructions on arm64 In-Reply-To: Message-ID: References: <20180803094129.GB17798@arm.com> User-Agent: Alpine 2.02 (LRH 1266 2009-07-14) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Sat, 04 Aug 2018 13:29:11 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Sat, 04 Aug 2018 13:29:11 +0000 (UTC) for IP:'10.11.54.5' DOMAIN:'int-mx05.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'mpatocka@redhat.com' RCPT:'' Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 3 Aug 2018, Matt Sealey wrote: > On 3 August 2018 at 13:25, Mikulas Patocka wrote: > > > > > > On Fri, 3 Aug 2018, Ard Biesheuvel wrote: > > > >> Are we still talking about overlapping unaligned accesses here? Or do > >> you see other failures as well? > > > > Yes - it is caused by overlapping unaligned accesses inside memcpy. When I > > put "dmb sy" between the overlapping accesses in > > glibc/sysdeps/aarch64/memcpy.S, this program doesn't detect any memory > > corruption. > > It is a symptom of generating reorderable accesses inside memcpy. It's nothing > to do with alignment, per se (see below). A dmb sy just hides the symptoms. > > What we're talking about here - yes, Ard, within certain amounts of > reason - is that you cannot use PCI BAR memory as 'Normal' - certainly > never cacheable memory, but Normal NC isn't good either. So, are you going to map the PCI BAR as Device-nGnRE and then emulate all the unaligned accesses in the trap handler? Or are you going to give up on supporting PCIe graphics on ARM at all? Videocards have linear framebuffer for 25 years. It was introduced as a feature that simplified graphics programming a lot - programmers can use C pointer arithmetics for drawing and they don't have to fiddle with hardware registers. If you argue that graphics programmers can't use it (after they have been using it for 25 years) - they will just ignore you and ARM. > Links is broken. What else should it use? Are you going to introduce new functions memcpy_to_framebuffer() and memset_framebuffer()? > Even on Intel. No, it's not. Intel will detect overlapping accesses. You can write this - it is legal C code: void g(void); void overlapping(unsigned char *p) { p[0] = p[1] = p[2] = p[3] = 1; g(); p[3] = p[4] = p[5] = p[6] = 2; } and the compiler compiles it to this: overlapping: .LFB0: pushl %ebx subl $8, %esp movl 16(%esp), %ebx movl $16843009, (%ebx) call g movl $33686018, 3(%ebx) addl $8, %esp popl %ebx ret Now - if the CPU is incapable of detecing the hazaard between writes to (%ebx) and 3(%ebx) and reorders these writes, it is just broken because it violates the C standard. If you argue that ARM is incapable of detecting this hazaard and reorders these two overlapping memory writes - it means that you can't use C pointers to access videoram on ARM - which means that you can't have PCIe graphics at all. Mikulas