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[209.132.180.67]) by mx.google.com with ESMTP id i62-v6si12798665pge.93.2018.08.06.06.55.04; Mon, 06 Aug 2018 06:55:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=RROYp1T5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730342AbeHFQCP (ORCPT + 99 others); Mon, 6 Aug 2018 12:02:15 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:56384 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727517AbeHFQCO (ORCPT ); Mon, 6 Aug 2018 12:02:14 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date; bh=F1b8heVRoDa1lGDJgz4V431dJDpfyPryjRXcSuVX62E=; b=RROYp1T5p2bIx6FR33cmMFfDMyWLciJNu2F+eW6Z+WyOaZQz6GueVoDd/1jVNiZLa5Ksl0DwIH3B/rYGJevxOAFkNwOU08lBtXccfnzvF6aoA1nP4mVSmkbpjPFpfn2vjpuOTad2PbHInxS4DmBpCy5t2HkG3KKSw6yMyUYBK7U=; Received: from andrew by vps0.lunn.ch with local (Exim 4.84_2) (envelope-from ) id 1fmfwP-000227-Hn; Mon, 06 Aug 2018 15:52:57 +0200 Date: Mon, 6 Aug 2018 15:52:57 +0200 From: Andrew Lunn To: Aditya Prayoga Cc: linux-gpio@vger.kernel.org, Richard Genoud , Gregory CLEMENT , Gauthier Provost , Alban Browaeys , Thierry Reding , Linus Walleij , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Dennis Gilmore , Ralph Sennhauser Subject: Re: [PATCH RESEND 2/2] gpio: mvebu: Allow to use non-default PWM counter Message-ID: <20180806135257.GB6584@lunn.ch> References: <1533522556-55055-1-git-send-email-aditya@kobol.io> <1533522556-55055-3-git-send-email-aditya@kobol.io> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1533522556-55055-3-git-send-email-aditya@kobol.io> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Aug 06, 2018 at 10:29:16AM +0800, Aditya Prayoga wrote: > On multiple PWM lines, if the other PWM counter is unused, allocate it > to next PWM request. The priority would be: > 1. Default counter assigned to the bank > 2. Unused counter that is assigned to other bank > 3. Fallback to default counter > > For example on second bank there are three PWM request, first one would > use default counter (counter B), second one would try to use counter A, > and the third one would use counter B. Hi Aditya There are only two PWM counters for all the GPIO lines. So you cannot support 3 PWM requests. You have to enforce a maximum of two PWMs. When i implemented this PWM code, i only needed one PWM. So it took the easy option. GPIO bank 0 uses counter A, GPIO bank1 uses counter B. For the hardware you have, this is not sufficient, so you need to generalise this. Any PWM can use any counter, whatever is available when the PWM is requested. Rather than have a linked list of PWM, i think it would be better to have a static array of two mvebu_pwm structures. Index 0 uses counter A, index 1 uses counter B. You can then keep with the concept of pwm->pgiod != NULL means the counter is in use. The request() call can then find an unused PWM, set pwm->gpiod, and point mvchip->mvpwm to one of the two static instances. Andrew