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From:   Alex Deucher <alexdeucher@gmail.com>
Date:   Mon, 6 Aug 2018 16:28:24 -0400
Message-ID: <CADnq5_Pd+1oBNQYQ_LWtBEfD1b=392Cx4MbPDuKWghnDnVZP+Q@mail.gmail.com>
Subject: Re: [PATCH] gpu: drm: radeon: si: Replace mdelay() with msleep() in si_pcie_gen3_enable()
To:     Jia-Ju Bai <baijiaju1990@gmail.com>
Cc:     "Deucher, Alexander" <alexander.deucher@amd.com>,
        Christian Koenig <christian.koenig@amd.com>,
        Chunming Zhou <David1.Zhou@amd.com>,
        Dave Airlie <airlied@linux.ie>,
        Maling list - DRI developers 
        <dri-devel@lists.freedesktop.org>,
        amd-gfx list <amd-gfx@lists.freedesktop.org>,
        LKML <linux-kernel@vger.kernel.org>
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On Fri, Aug 3, 2018 at 8:33 PM, Jia-Ju Bai <baijiaju1990@gmail.com> wrote:
> si_pcie_gen3_enable() is never called in atomic context.
> It calls mdelay() to busily wait, which is not necessary.
> mdelay() can be replaced with msleep().
>
> This is found by a static analysis tool named DCNS written by myself
>
> Signed-off-by: Jia-Ju Bai <baijiaju1990@gmail.com>

Applied.  thanks!

Alex

> ---
>  drivers/gpu/drm/radeon/si.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
> index 1907c950d76f..c28743443970 100644
> --- a/drivers/gpu/drm/radeon/si.c
> +++ b/drivers/gpu/drm/radeon/si.c
> @@ -7181,7 +7181,7 @@ static void si_pcie_gen3_enable(struct radeon_device *rdev)
>                                 tmp |= LC_REDO_EQ;
>                                 WREG32_PCIE_PORT(PCIE_LC_CNTL4, tmp);
>
> -                               mdelay(100);
> +                               msleep(100);
>
>                                 /* linkctl */
>                                 pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL, &tmp16);
> --
> 2.17.0
>
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