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Message-ID: <58c02aeff4285498272b0a13b8de2dc1282fded9.camel@linux.intel.com>
Subject: Re: [PATCH] gpio: Add driver for PC Engines APU2/APU3 GPIOs
From:   Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To:     Florian Eckert <fe@dev.tdt.de>,
        Christian Lamparter <chunkeey@gmail.com>
Cc:     Linus Walleij <linus.walleij@linaro.org>,
        Mika Westerberg <mika.westerberg@linux.intel.com>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
        linux-kernel@vger.kernel.org
Date:   Tue, 07 Aug 2018 22:18:19 +0300
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On Tue, 2018-08-07 at 13:18 +0200, Florian Eckert wrote:
> Hello Andy
> 
> I think this are the information you want to have.
> 

I was rather asking for something like TRM.

By schematics, I meant a simplified GPIO buffers and pin control
explained on hardware level.

Below has nothing to do with either, unfortunately.

> On 2018-08-04 20:22, Christian Lamparter wrote:
> > As for the APUs. The vendor (PC Engines) happily provides
> > PDFs and schematics for their boards:
> > <https://www.pcengines.ch/pdf/apu1.pdf>
> > <https://www.pcengines.ch/schema/apu1c.pdf>
> > <https://www.pcengines.ch/pdf/apu2.pdf>
> > <http://pcengines.ch/schema/apu2c.pdf>

-- 
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy