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[209.132.180.67]) by mx.google.com with ESMTP id bb1-v6si3854508plb.480.2018.08.08.11.59.21; Wed, 08 Aug 2018 11:59:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@agner.ch header.s=dkim header.b="b0K/tVl3"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730235AbeHHVTM (ORCPT + 99 others); Wed, 8 Aug 2018 17:19:12 -0400 Received: from mail.kmu-office.ch ([178.209.48.109]:51102 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728134AbeHHVTM (ORCPT ); Wed, 8 Aug 2018 17:19:12 -0400 Received: from webmail.kmu-office.ch (unknown [IPv6:2a02:418:6a02::a3]) by mail.kmu-office.ch (Postfix) with ESMTPSA id 3D36A5C0491; Wed, 8 Aug 2018 20:58:10 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=agner.ch; s=dkim; t=1533754690; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=UNj3frUBMyoj8308SEGkRnsVEk1NdhoU/iPZ0Dolx/M=; b=b0K/tVl3MHNO3T7Z2Gbx3Bnax3edB5QeY12f2yFNfr3iUggqZw51ealpAwkr7fN8sb0Faq +gdB7CJYsGT1gP5In07z7oOQYY7F0hy9aeLSSEMaWVGj90wrypT7ZRX2Tkq1/gvkvKBVrW i6RDjQWerzR67WBSBDVIo5IwOOVJ67g= MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Date: Wed, 08 Aug 2018 20:58:10 +0200 From: Stefan Agner To: Leonard Crestez Cc: Marek Vasut , Shawn Guo , Philipp Zabel , Robert Chiras , Fabio Estevam , Anson Huang , dri-devel@lists.freedesktop.org, Dong Aisheng , linux-imx@nxp.com, kernel@pengutronix.de, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 2/5] drm/mxsfb: Fix initial corrupt frame when activating display In-Reply-To: <056bd70ef7bf4d66d636cf7869a489e8c743aaf3.1533743954.git.leonard.crestez@nxp.com> References: <056bd70ef7bf4d66d636cf7869a489e8c743aaf3.1533743954.git.leonard.crestez@nxp.com> Message-ID: X-Sender: stefan@agner.ch User-Agent: Roundcube Webmail/1.3.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 08.08.2018 18:08, Leonard Crestez wrote: > LCDIF will repeatedly display data from CUR_BUF and set CUR_BUF to > NEXT_BUF when done. Since we are only ever writing to NEXT_BUF the > display will show an initial corrupt frame. > > Fix by writing the FB paddr to both CUR_BUF and NEXT_BUF when > activating the CRTC. > > Signed-off-by: Leonard Crestez > Tested-by: Philipp Zabel Reviewed-by: Stefan Agner > --- > drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 45 +++++++++++++++++++++--------- > 1 file changed, 32 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c > b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c > index e4fcbb65b969..24b1f0c1432e 100644 > --- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c > +++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c > @@ -191,10 +191,25 @@ static int mxsfb_reset_block(void __iomem *reset_addr) > return ret; > > return clear_poll_bit(reset_addr, MODULE_CLKGATE); > } > > +static dma_addr_t mxsfb_get_fb_paddr(struct mxsfb_drm_private *mxsfb) > +{ > + struct drm_framebuffer *fb = mxsfb->pipe.plane.state->fb; > + struct drm_gem_cma_object *gem; > + > + if (!fb) > + return 0; > + > + gem = drm_fb_cma_get_gem_obj(fb, 0); > + if (!gem) > + return 0; > + > + return gem->paddr; > +} > + > static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb) > { > struct drm_display_mode *m = &mxsfb->pipe.crtc.state->adjusted_mode; > const u32 bus_flags = mxsfb->connector.display_info.bus_flags; > u32 vdctrl0, vsync_pulse_len, hsync_pulse_len; > @@ -267,12 +282,22 @@ static void mxsfb_crtc_mode_set_nofb(struct > mxsfb_drm_private *mxsfb) > mxsfb->base + LCDC_VDCTRL4); > } > > void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb) > { > + dma_addr_t paddr; > + > mxsfb_enable_axi_clk(mxsfb); > mxsfb_crtc_mode_set_nofb(mxsfb); > + > + /* Write cur_buf as well to avoid an initial corrupt frame */ > + paddr = mxsfb_get_fb_paddr(mxsfb); > + if (paddr) { > + writel(paddr, mxsfb->base + mxsfb->devdata->cur_buf); > + writel(paddr, mxsfb->base + mxsfb->devdata->next_buf); > + } > + > mxsfb_enable_controller(mxsfb); > } > > void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb) > { > @@ -283,16 +308,12 @@ void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb) > void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb, > struct drm_plane_state *state) > { > struct drm_simple_display_pipe *pipe = &mxsfb->pipe; > struct drm_crtc *crtc = &pipe->crtc; > - struct drm_framebuffer *fb = pipe->plane.state->fb; > struct drm_pending_vblank_event *event; > - struct drm_gem_cma_object *gem; > - > - if (!crtc) > - return; > + dma_addr_t paddr; > > spin_lock_irq(&crtc->dev->event_lock); > event = crtc->state->event; > if (event) { > crtc->state->event = NULL; > @@ -303,14 +324,12 @@ void mxsfb_plane_atomic_update(struct > mxsfb_drm_private *mxsfb, > drm_crtc_send_vblank_event(crtc, event); > } > } > spin_unlock_irq(&crtc->dev->event_lock); > > - if (!fb) > - return; > - > - gem = drm_fb_cma_get_gem_obj(fb, 0); > - > - mxsfb_enable_axi_clk(mxsfb); > - writel(gem->paddr, mxsfb->base + mxsfb->devdata->next_buf); > - mxsfb_disable_axi_clk(mxsfb); > + paddr = mxsfb_get_fb_paddr(mxsfb); > + if (paddr) { > + mxsfb_enable_axi_clk(mxsfb); > + writel(paddr, mxsfb->base + mxsfb->devdata->next_buf); > + mxsfb_disable_axi_clk(mxsfb); > + } > }