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[209.132.180.67]) by mx.google.com with ESMTP id m10-v6si4722960pfe.133.2018.08.08.14.52.02; Wed, 08 Aug 2018 14:52:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="NAP/VYVd"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730072AbeHIAMs (ORCPT + 99 others); Wed, 8 Aug 2018 20:12:48 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:35938 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727530AbeHIAMs (ORCPT ); Wed, 8 Aug 2018 20:12:48 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id w78Lp9eP017841; Wed, 8 Aug 2018 16:51:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1533765069; bh=EYwR8nHFR8F6HB3k6DPuVVwgITgyTxG0Mr8+/jbK9BM=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=NAP/VYVdQlIsr65ozfbxQBrrsyUU1+HfB5wFtF2xgpg7pNzzLs408fmSNAa3f0PBJ yJzEMNWqA2NADsMfT6LZ4ua3nct0Elc4Nge0WIFxN5gwoa8OsSZBQAq7mSVq0f0QCR OrXFahKHAEL4UWH5K+kWedmXMIotTpidQVa+ZpE8= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w78Lp9HN002092; Wed, 8 Aug 2018 16:51:09 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 8 Aug 2018 16:51:09 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 8 Aug 2018 16:51:08 -0500 Received: from [172.22.156.167] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w78Lp89r031205; Wed, 8 Aug 2018 16:51:08 -0500 Subject: Re: [PATCH v2 1/2] dt: bindings: lm3697: Add bindings for lm3697 driver To: Pavel Machek CC: , , , , References: <20180807160442.8937-1-dmurphy@ti.com> <20180808195903.GB20912@amd> <20180808210215.GA15831@amd> <20180808210926.GC15831@amd> <20180808214527.GE15831@amd> From: Dan Murphy Message-ID: <65e927b4-8bd2-1f34-3422-36ce21f674c3@ti.com> Date: Wed, 8 Aug 2018 16:50:59 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20180808214527.GE15831@amd> Content-Type: text/plain; charset="windows-1252" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Pavel On 08/08/2018 04:45 PM, Pavel Machek wrote: > On Wed 2018-08-08 16:41:16, Dan Murphy wrote: >> On 08/08/2018 04:09 PM, Pavel Machek wrote: >>> On Wed 2018-08-08 16:04:43, Dan Murphy wrote: >>>> On 08/08/2018 04:02 PM, Pavel Machek wrote: >>>>> Hi! >>>>> >>>>>>>> + - #size-cells : 0 >>>>>>>> + - control-bank-cfg - : Indicates which sink is connected to which control bank >>>>>>>> + 0 - All HVLED outputs are controlled by bank A >>>>>>>> + 1 - HVLED1 is controlled bank B, HVLED2/3 are controlled by bank A >>>>>>>> + 2 - HVLED2 is controlled bank B, HVLED1/3 are controlled by bank A >>>>>>>> + 3 - HVLED1/2 are controlled by bank B, HVLED3 is controlled by bank A >>>>>>>> + 4 - HVLED3 is controlled by bank B, HVLED1/2 are controlled by bank A >>>>>>>> + 5 - HVLED1/3 is controlled by bank B, HVLED2 is controlled by bank A >>>>>>>> + 6 - (default) HVLED1 is controlled by bank A, HVLED2/3 are controlled by bank B >>>>>>>> + 7 - All HVLED outputs are controlled by bank B >>>>>>> >>>>>>> This is quite long way to describe a bitmask, no? Could we make >>>>>>> it so that control-bank-cfg is not needed? >>>>>> >>>>>> The problem we have here is there is a potential to control >>>>>> 3 different LED string but only 2 sinks. So control bank A can control 2 LED strings and control >>>>>> bank b can control 1 LED string. >>>>>> >>>>> >>>>> Can we forget about the LED strings, and just expose the sinks as >>>>> Linux LED devices? >>>> >>>> 2 sinks 3 LED strings. How do you know which LED string is which and what bank it belongs >>>> to when setting the brightness. Each Bank has a separate register for brightness control. >>> >>> Yes, and LED strings are statically assigned to banks, right? >>> >>> So why not simply forget about LED strings for sake of hw >>> abstractions, and work just with banks? >> >> How would you set the control bank register for the correct LED string configuration? > > Have property at each LED saying which which HVLEDs it controls? Isn't that what I have already using the reg property? Then we would have to aggregate the configuration and make a determination in the driver. But that does not follow the LED child node ideology. Each output of the LED driver should have a child node. In this case the outputs are the sinks(inputs) and there are only 2 sinks so having 3 LED child nodes would be confusing and there are required properties for each child like label. Each child node would then need to present 1 LED node to the user space to control the LED string. Which would be technically incorrect because you would have 2 LED nodes controlling the same control bank sink. > > Pavel > -- ------------------ Dan Murphy