Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp1506607imm; Wed, 8 Aug 2018 19:18:59 -0700 (PDT) X-Google-Smtp-Source: AA+uWPzaAeSl6dHwzcGf07Cfre6jC4QQBf7Ldngf97E8+IASX/QzW9Wr9ZaLZv11vsahipx6lsHe X-Received: by 2002:a65:448c:: with SMTP id l12-v6mr194177pgq.277.1533781139164; Wed, 08 Aug 2018 19:18:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533781139; cv=none; d=google.com; s=arc-20160816; b=WN2ip9Yh8QFc/EJWm6iaadCCXmAFCePxBPwfbjMouXahR1568rkVmV2ZFzDzjK73M5 Hn5hJU2mLHxsJNKAldVMwde68w0EBTUYFTBye8Bo5qiIaiEWXO+aZa7ag07vVnYq7YZ9 VJ/964a2FH0Gi5XY5Jt3BHS2QXckFuXZ+0PFHAFonbnG6++MUeoMSOhdCfhHjYRkmMI+ 9AOdjyRH+dM+aRnZS7u8KyjaMNg3soOTD3KY/6RUFEZdQDNxk84EpHQEt6W8XCe+Aryg PiiM3LFff2552BxTeUXvlG7aVh3f6akQCwezvw+1VLGESXXCNbjSi7pAajQ0wsF4VCZh qYfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=vKRCpp6eZwM0/U16qmp8O1Ff5//bkzc5M1sEoyzKkiA=; b=PyRtnQ1u107ZRPfP5jJSEVM6Xl6mb0ZtKMq5VGc1iVKPGABbTFL73pWRoLE3GQfbsP zycKR42C1gpBqMn9X0cqW9LHgCCr0Q+WIoNHMKqbtfXXo++zk4F2+B8UAF3Ee5/j0ER2 UGQJDIXgCeGObB0g9aio42zH3MOS5ZsM7Z53GX026AxfPqaVJAeMUBzOCOWd16PGid2P Q2ENdaSeXag2rIpj9nz4QbAcRgM+kPVaqTlQswXBbblaqwqT/PqAJxU1l7mWWkHz9me/ qLxtYNuRmEk7xZzXreuh7FMw9id9F1rlLEj+w5pmluMHSXHl74WqsRVzpEMsf9f0LMdX wu1g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p16-v6si5261732pgc.82.2018.08.08.19.18.44; Wed, 08 Aug 2018 19:18:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728585AbeHIEjO (ORCPT + 99 others); Thu, 9 Aug 2018 00:39:14 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:61614 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727211AbeHIEic (ORCPT ); Thu, 9 Aug 2018 00:38:32 -0400 X-UUID: 632307c79d0049019f91365bef04aff1-20180809 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 339140550; Thu, 09 Aug 2018 10:15:54 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Thu, 9 Aug 2018 10:15:52 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Thu, 9 Aug 2018 10:15:52 +0800 From: Stu Hsieh To: CK Hu , Philipp Zabel CC: David Airlie , Matthias Brugger , , , , , , Stu Hsieh Subject: [PATCH v4 10/14] drm/mediatek: add function to return OVL layer number Date: Thu, 9 Aug 2018 10:15:45 +0800 Message-ID: <1533780949-30141-11-git-send-email-stu.hsieh@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1533780949-30141-1-git-send-email-stu.hsieh@mediatek.com> References: <1533780949-30141-1-git-send-email-stu.hsieh@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch add function to return OVL layer number For now, MT8173, MT2712, MT2701 OVL all has 4 layer. Signed-off-by: Stu Hsieh Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c index 0facd823c552..28d191192945 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -132,6 +132,11 @@ static void mtk_ovl_config(struct mtk_ddp_comp *comp, unsigned int w, writel(0x0, comp->regs + DISP_REG_OVL_RST); } +static unsigned int mtk_ovl_layer_nr(struct mtk_ddp_comp *comp) +{ + return 4; +} + static void mtk_ovl_layer_on(struct mtk_ddp_comp *comp, unsigned int idx) { unsigned int reg; @@ -226,6 +231,7 @@ static const struct mtk_ddp_comp_funcs mtk_disp_ovl_funcs = { .stop = mtk_ovl_stop, .enable_vblank = mtk_ovl_enable_vblank, .disable_vblank = mtk_ovl_disable_vblank, + .layer_nr = mtk_ovl_layer_nr, .layer_on = mtk_ovl_layer_on, .layer_off = mtk_ovl_layer_off, .layer_config = mtk_ovl_layer_config, -- 2.12.5.2.gbdf23ab