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[209.132.180.67]) by mx.google.com with ESMTP id p1-v6si8914911pfb.280.2018.08.09.14.47.26; Thu, 09 Aug 2018 14:47:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@crapouillou.net header.s=mail header.b=LoNbRO4t; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728124AbeHJAMt (ORCPT + 99 others); Thu, 9 Aug 2018 20:12:49 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:60464 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727730AbeHJAL6 (ORCPT ); Thu, 9 Aug 2018 20:11:58 -0400 From: Paul Cercueil To: Rob Herring , Mark Rutland , Thierry Reding , Daniel Lezcano , Thomas Gleixner , Wim Van Sebroeck , Guenter Roeck , Ralf Baechle , Paul Burton , James Hogan , Jonathan Corbet , Lee Jones , Mathieu Malaterre , Ezequiel Garcia Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-mips@linux-mips.org, linux-doc@vger.kernel.org, linux-clk@vger.kernel.org, Paul Cercueil Subject: [PATCH v6 13/24] pwm: jz4740: Allow selection of PWM channels 0 and 1 Date: Thu, 9 Aug 2018 23:44:03 +0200 Message-Id: <20180809214414.20905-14-paul@crapouillou.net> In-Reply-To: <20180809214414.20905-1-paul@crapouillou.net> References: <20180809214414.20905-1-paul@crapouillou.net> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1533851112; bh=3vYNuHpyzRB2JnMMYKKnCUgTu6dUaN7N0Z2NkSwih2Y=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=LoNbRO4t8Y0JJcj9t7D3JDROjdHMpOnVYNTjLI0+48RyAMIa1jFFIAet2l4/jo37zTmPXRqwycSOx5m896QGsOXN9uu2idxjNoJFTzFU4YqRb4tBmdML4B75hbAx8xb8GJrscg6MWreB038nZM9b+OnNj596VYtWE5W4fOH94Bc= Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The TCU channels 0 and 1 were previously reserved for system tasks, and thus unavailable for PWM. This commit uses the newly introduced API functions of the ingenic-timer driver to request/release the TCU channels that should be used as PWM. This allows all the TCU channels to be used as PWM. Signed-off-by: Paul Cercueil --- drivers/pwm/pwm-jz4740.c | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) v6: New patch diff --git a/drivers/pwm/pwm-jz4740.c b/drivers/pwm/pwm-jz4740.c index 1bda8d8e9865..d08274ec007f 100644 --- a/drivers/pwm/pwm-jz4740.c +++ b/drivers/pwm/pwm-jz4740.c @@ -43,27 +43,30 @@ static int jz4740_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) char clk_name[16]; int ret; - /* - * Timers 0 and 1 are used for system tasks, so they are unavailable - * for use as PWMs. - */ - if (pwm->hwpwm < 2) - return -EBUSY; + ret = ingenic_tcu_request_channel(pwm->hwpwm); + if (ret) + return ret; snprintf(clk_name, sizeof(clk_name), "timer%u", pwm->hwpwm); clk = clk_get(chip->dev, clk_name); - if (IS_ERR(clk)) - return PTR_ERR(clk); + if (IS_ERR(clk)) { + ret = PTR_ERR(clk); + goto err_free_channel; + } ret = clk_prepare_enable(clk); - if (ret) { - clk_put(clk); - return ret; - } + if (ret) + goto err_clk_put; jz->clks[pwm->hwpwm] = clk; return 0; + +err_clk_put: + clk_put(clk); +err_free_channel: + ingenic_tcu_release_channel(pwm->hwpwm); + return ret; } static void jz4740_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) @@ -73,6 +76,7 @@ static void jz4740_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) clk_disable_unprepare(clk); clk_put(clk); + ingenic_tcu_release_channel(pwm->hwpwm); } static int jz4740_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) -- 2.11.0