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[209.132.180.67]) by mx.google.com with ESMTP id l15-v6si10227520pgh.593.2018.08.10.10.53.18; Fri, 10 Aug 2018 10:53:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728460AbeHJUXM (ORCPT + 99 others); Fri, 10 Aug 2018 16:23:12 -0400 Received: from mga01.intel.com ([192.55.52.88]:44901 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728142AbeHJUXM (ORCPT ); Fri, 10 Aug 2018 16:23:12 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Aug 2018 10:52:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,220,1531810800"; d="scan'208";a="223652690" Received: from rchatre-mobl.amr.corp.intel.com (HELO [10.24.14.94]) ([10.24.14.94]) by orsmga004.jf.intel.com with ESMTP; 10 Aug 2018 10:52:21 -0700 Subject: Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf From: Reinette Chatre To: Peter Zijlstra Cc: Dave Hansen , tglx@linutronix.de, mingo@redhat.com, fenghua.yu@intel.com, tony.luck@intel.com, vikas.shivappa@linux.intel.com, gavin.hindman@intel.com, jithu.joseph@intel.com, hpa@zytor.com, x86@kernel.org, linux-kernel@vger.kernel.org References: <086b93f5-da5b-b5e5-148a-cef25117b963@intel.com> <20180803104956.GU2494@hirez.programming.kicks-ass.net> <1eece033-fbae-c904-13ad-1904be91c049@intel.com> <20180803152523.GY2476@hirez.programming.kicks-ass.net> <57c011e1-113d-c38f-c318-defbad085843@intel.com> <20180806221225.GO2458@hirez.programming.kicks-ass.net> <08d51131-7802-5bfe-2cae-d116807183d1@intel.com> <20180807093615.GY2494@hirez.programming.kicks-ass.net> <20180808075154.GN2494@hirez.programming.kicks-ass.net> <5960739f-ee27-b182-3804-7e5d9356457f@intel.com> Message-ID: <05008c82-7bef-e02d-0274-f4608e86b41d@intel.com> Date: Fri, 10 Aug 2018 10:52:21 -0700 User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Just one clarification ... On 8/10/2018 9:25 AM, Reinette Chatre wrote: > static inline int x86_perf_event_error_state(struct perf_event *event) > { > int ret = 0; > u64 tmp; > > ret = perf_event_read_local(event, &tmp, NULL, NULL); > if (ret < 0) > return ret; > > if (event->attr.pinned && event->oncpu != smp_processor_id()) > return -EBUSY; I am preparing a patch series and in that the above extra test will be included as the last sanity check in perf_event_read_local() as you suggested. This inline function will thus go away and the only error state check would be a call to perf_event_read_local(). Reinette