Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp283689imm; Fri, 10 Aug 2018 11:10:37 -0700 (PDT) X-Google-Smtp-Source: AA+uWPzOyj1OrfnA+aqe91x0+UKik0qNGo6tS3Xy684jwUQyUw2J0eb2QVINZSnhp0duUrEy85LN X-Received: by 2002:a63:1403:: with SMTP id u3-v6mr7481367pgl.13.1533924637644; Fri, 10 Aug 2018 11:10:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533924637; cv=none; d=google.com; s=arc-20160816; b=HE54GHJatdRUAcNqtniU1l6wOmAozbiKo9bktcJFa8JQ/8VCPQzQdWORTUUsWb3z+x 7KgBctLcy18YpI0XCG+w3GKIqTbw4xD1APMgyTh/M8w2YQvHabo6EW2GEYz3fq+8KcA2 6m558KJR/zW/bwz8LgNH8UoTEJ8K1/Gh7esus42aDbjXfmlo13bNGjzgGcBkWWqUNWrT 8cVQ5JmXnuGyY7uYSjaw+1m16lZDe3Wcw+6VTvDiQLHvQp8BtkKwpw29EdKfjhOdJ6R7 jfnDWZZCrgEKE+9WNxP/n/js1p3HnbqAwo5a3FE/gBZnj/p/nCB7GuHPExLxd4SN/oyz lHsw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=i8NZBbECjMT0SnHVlGxiYJQlHAULgxwZKaE1z+iU4EQ=; b=0L17LlQDwXFS6b5dtBagwiXgX82C6CPTVOG8AKQCFPrPIh+rNcg7K0vYG6M2Do2HAB ER4O/BADH/wJmYRYHoCjwJLWTMg0Q+2WdCOc0D53funR7+9SWikmyZAGOde2wopwQU02 PM8UYhOgjmVtNNObSjtcbTxfxo9oUiLfmUlAjPXmbs8OxAiEVwkdyZJ8wM7jKwP0QGer HfJZhPiwORrR/QcPod3d+PTcctF6+VPzK+ZIWgPB0mkjwA9+uZ/Gap9GlPJodg9ZCTC1 Ctn/VNkA0Zujr0NQuoCF5St4/v08Sa57Ff818NEqpFMrOTGwxjfGRlsrnh0vRSaqrFFH ah4Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w19-v6si9555177pfn.160.2018.08.10.11.10.22; Fri, 10 Aug 2018 11:10:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729717AbeHJUkG (ORCPT + 99 others); Fri, 10 Aug 2018 16:40:06 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:11326 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728110AbeHJUkG (ORCPT ); Fri, 10 Aug 2018 16:40:06 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com (using TLS: TLSv1, AES128-SHA) id ; Fri, 10 Aug 2018 11:08:55 -0700 Received: from HQMAIL101.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Fri, 10 Aug 2018 11:09:10 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 10 Aug 2018 11:09:10 -0700 Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 10 Aug 2018 18:09:09 +0000 Received: from HQMAIL104.nvidia.com (172.18.146.11) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 10 Aug 2018 18:09:09 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Fri, 10 Aug 2018 18:09:09 +0000 Received: from dhcp-10-21-25-168.Nvidia.com (Not Verified[10.21.25.201]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Fri, 10 Aug 2018 11:09:09 -0700 From: Aapo Vienamo To: Rob Herring , Mark Rutland , Thierry Reding , Jonathan Hunter , Ulf Hansson , Adrian Hunter , Mikko Perttunen , "Stefan Agner" CC: , , , , Aapo Vienamo Subject: [PATCH v2 07/40] soc/tegra: pmc: Implement tegra_io_pad_is_powered() Date: Fri, 10 Aug 2018 21:08:09 +0300 Message-ID: <1533924522-1037-8-git-send-email-avienamo@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533924522-1037-1-git-send-email-avienamo@nvidia.com> References: <1533924522-1037-1-git-send-email-avienamo@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Implement a function to query whether a pad is in deep power down mode. This is needed by the pinctrl callbacks. Signed-off-by: Aapo Vienamo Acked-by: Jon Hunter --- drivers/soc/tegra/pmc.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index f88bcb6..eb9385f 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -1075,6 +1075,21 @@ int tegra_io_pad_power_disable(enum tegra_io_pad id) } EXPORT_SYMBOL(tegra_io_pad_power_disable); +static int tegra_io_pad_is_powered(enum tegra_io_pad id) +{ + unsigned long request, status; + u32 mask, value; + int err; + + err = tegra_io_pad_get_dpd_register_bit(id, &request, &status, &mask); + if (err) + return err; + + value = tegra_pmc_readl(status); + + return !(value & mask); +} + int tegra_io_pad_set_voltage(enum tegra_io_pad id, enum tegra_io_pad_voltage voltage) { -- 2.7.4