Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp301523imm;
        Fri, 10 Aug 2018 11:30:00 -0700 (PDT)
X-Google-Smtp-Source: AA+uWPxt+fAUiTO9tw4oj5YXIMb1Vui064tYoXzt6P5tIG2K3fT7SzHpFT8Xty94xBc5ryoLTpSW
X-Received: by 2002:a63:5c7:: with SMTP id 190-v6mr7324535pgf.385.1533925800191;
        Fri, 10 Aug 2018 11:30:00 -0700 (PDT)
ARC-Seal: i=1; a=rsa-sha256; t=1533925800; cv=none;
        d=google.com; s=arc-20160816;
        b=0HaLtpXkGcmPnSl2Y9sTr12aeaAGbgF1vnpAISAN0kfQcN3baeyP1OhYYCkBsbhozS
         Ya9x85ZuCWZiadsnXQYciokYSHYRKZQEOYU8R38kqUrj2ncE4Oxb/rNrljnXLF4KwU9f
         xXAhIWQu9ATz0ZL1Q6jpEmIhDsfd4I0vks1BZhWt4hywpgMie6fS21/8xi3ZyI/TB8+Y
         LIXl1oWXMtNhHuYolipBLLxt//F+nC4WOOpwDEq61cv1MgdPLHS0Yjjh3MxMMxgzFLkx
         JJ1JVIv+vU5qTiViuxD9+LrBmWJJ+DKSHaf9P8G6hZVWUNxsZOy4DlKZFfDP0Ll+uncq
         vE7A==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=list-id:precedence:sender:mime-version:references:in-reply-to
         :message-id:date:subject:cc:to:from:arc-authentication-results;
        bh=j7DI3VIwqUYa/sQ9dFBN62JeM8iToao6rmzie2za2gs=;
        b=V7kyjEMA7aDZZjD5BdCik1V/Rx/O5GV+MXVXx/JYgtPg+JIyoj06UOWpUEK3mZsqEo
         Li9wcOSNyzEMjkQzZGdX87qyfhmah5St61XHdKozSthuGCgU2tBsE0o70gQLTMuwN4Ao
         RJzaHwH2nlJy8ZYs/FGLZ18l9bM0N4GZP71vTvIgvV1Rzd4D/DTbcB7K+uXm7FJk0My7
         hRYA9Pi0qsxFezbiVYMt3prGB6ttYvRqCOwH/rVRJaajLkgMPPwyqNDvkGE0nSFoUr7y
         3T6GmcmKcm+2v4dkoAVQCy3uM/AY1uhFww+zLHPM3X0h2KKGnydsXsDSgQGl88p3zlAy
         OSrA==
ARC-Authentication-Results: i=1; mx.google.com;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67])
        by mx.google.com with ESMTP id o184-v6si10795757pga.520.2018.08.10.11.29.45;
        Fri, 10 Aug 2018 11:30:00 -0700 (PDT)
Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Authentication-Results: mx.google.com;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1730828AbeHJUpc (ORCPT <rfc822;stevepeted@gmail.com>
        + 99 others); Fri, 10 Aug 2018 16:45:32 -0400
Received: from hqemgate16.nvidia.com ([216.228.121.65]:4393 "EHLO
        hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S1728017AbeHJUpb (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Fri, 10 Aug 2018 16:45:31 -0400
Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1, AES128-SHA)
        id <B5b6dd6070000>; Fri, 10 Aug 2018 11:14:31 -0700
Received: from HQMAIL101.nvidia.com ([172.20.161.6])
  by hqpgpgate101.nvidia.com (PGP Universal service);
  Fri, 10 Aug 2018 11:14:34 -0700
X-PGP-Universal: processed;
        by hqpgpgate101.nvidia.com on Fri, 10 Aug 2018 11:14:34 -0700
Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL101.nvidia.com
 (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 10 Aug
 2018 18:14:33 +0000
Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL107.nvidia.com
 (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend
 Transport; Fri, 10 Aug 2018 18:14:33 +0000
Received: from dhcp-10-21-25-168.Nvidia.com (Not Verified[10.21.25.201]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121)
        id <B5b6dd6070000>; Fri, 10 Aug 2018 11:14:33 -0700
From:   Aapo Vienamo <avienamo@nvidia.com>
To:     Ulf Hansson <ulf.hansson@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Thierry Reding <thierry.reding@gmail.com>,
        Jonathan Hunter <jonathanh@nvidia.com>,
        Adrian Hunter <adrian.hunter@intel.com>,
        Mikko Perttunen <mperttunen@nvidia.com>
CC:     <linux-mmc@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        Aapo Vienamo <avienamo@nvidia.com>
Subject: [PATCH v2 8/8] arm64: dts: tegra210: Enable HS400
Date:   Fri, 10 Aug 2018 21:14:05 +0300
Message-ID: <1533924845-1466-9-git-send-email-avienamo@nvidia.com>
X-Mailer: git-send-email 2.7.4
In-Reply-To: <1533924845-1466-1-git-send-email-avienamo@nvidia.com>
References: <1533924845-1466-1-git-send-email-avienamo@nvidia.com>
X-NVConfidentiality: public
MIME-Version: 1.0
Content-Type: text/plain
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Enable HS400 signaling on Tegra210 SDMMC4 controller.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra210.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index f8e5f09..8fe47d6 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -1116,6 +1116,7 @@
 				  <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>;
 		assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>;
 		nvidia,dqs-trim = <40>;
+		mmc-hs400-1_8v;
 		status = "disabled";
 	};
 
-- 
2.7.4