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[209.132.180.67]) by mx.google.com with ESMTP id m86-v6si18231472pfj.48.2018.08.13.09.20.37; Mon, 13 Aug 2018 09:20:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@synopsys.com header.s=mail header.b=Kf8WZxN8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=synopsys.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730058AbeHMTCS (ORCPT + 99 others); Mon, 13 Aug 2018 15:02:18 -0400 Received: from us01smtprelay-2.synopsys.com ([198.182.60.111]:52234 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728455AbeHMTCS (ORCPT ); Mon, 13 Aug 2018 15:02:18 -0400 Received: from mailhost.synopsys.com (mailhost1.synopsys.com [10.12.238.239]) by smtprelay.synopsys.com (Postfix) with ESMTP id 735B310C0266; Mon, 13 Aug 2018 09:19:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1534177163; bh=/HFuHzFcPYWm6C0H/AllrCyUO/Xm06SWnCPo3OpqmpI=; h=From:To:CC:Subject:Date:References:From; b=Kf8WZxN81XR+Ixz7QnQkvB57Ff31qhLkw2WF0e+aOD9KklZb08G3ym/7vA+sz2a+C kaq15lcjoVg+w5gIjma8D+DhK37VbF+702hypd9W5EhBanYX1/04SFSUlTQSU6Al86 KTjxgijDMDk4ookuKE+0BCYail3PZWwXZ/fSbddNlXb2US8lB8+XlFL2OAspBzaTE5 JOXwxGAnGhk7j1D+8UEF0z+crVdhppSTp/JGz7s8xob3Ux+vADf2oXjbZjz/f6CKd0 pT+7xJ4+8Ie54KIgi7Y0bf/2jnNByIZUwzojrwsVxUogGm9p7ACkKyeAq0Rb3q+Eju KHhD0L+Gr2hQw== Received: from US01WEHTC3.internal.synopsys.com (us01wehtc3.internal.synopsys.com [10.15.84.232]) by mailhost.synopsys.com (Postfix) with ESMTP id 3C0B652D8; Mon, 13 Aug 2018 09:19:23 -0700 (PDT) Received: from us01wembx1.internal.synopsys.com ([169.254.1.253]) by US01WEHTC3.internal.synopsys.com ([::1]) with mapi id 14.03.0361.001; Mon, 13 Aug 2018 09:19:22 -0700 From: Vineet Gupta To: Eugeniy Paltsev , "linux-snps-arc@lists.infradead.org" CC: "linux-kernel@vger.kernel.org" , "linux-arch@vger.kernel.org" , Alexey Brodkin , "hch@lst.de" Subject: Re: [PATCH v2 0/4] ARC: allow to use IOC and non-IOC DMA devices simultaneously Thread-Topic: [PATCH v2 0/4] ARC: allow to use IOC and non-IOC DMA devices simultaneously Thread-Index: AQHUKCIZ2r1FEf6H/EahxizEoOt7oQ== Date: Mon, 13 Aug 2018 16:19:21 +0000 Message-ID: References: <20180730162636.3556-1-Eugeniy.Paltsev@synopsys.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.144.199.104] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07/30/2018 09:26 AM, Eugeniy Paltsev wrote:=0A= > The ARC HS processor provides an IOC port (I/O coherency bus=0A= > interface) that allows external devices such as DMA devices=0A= > to access memory through the cache hierarchy, providing=0A= > coherency between I/O transactions and the complete memory=0A= > hierarchy.=0A= =0A= You didn't pay attention to my previous comment on this !=0A= IOC port can be considered a micro-architecture optimization (an important = one=0A= though). The main thing is hardware snooping DMA transactions which enabled= IOC in=0A= first place.=0A= =0A= > Some recent SoC with ARC HS (like HSDK) allow to select bus=0A= > port (IOC or non-IOC port) for connecting DMA devices in runtime.=0A= =0A= Again you mention the port but none of your 4 patches actually touch the po= rt=0A= itself in programming it.=0A= =0A= =0A= > With this patch we can use both HW-coherent and regular DMA=0A= > peripherals simultaneously.=0A= >=0A= > NOTE:=0A= > This patch series was stress tested on HSDK with iperf3 (ethernet)=0A= > and bonie++ (usb and sdio) in three configurations:=0A= > * IOC enabled globaly=0A= > * IOC disabled globaly=0A= > * IOC enabled partially (USB & SDIO are connected via IOC AXI port,=0A= > ethernet is connected to DDR AXI port (non-IOC port) =0A= >=0A= > NOTE:=0A= > If you want to test some device without IOC it is not enough=0A= > to remove "dma-coherent" property from dts. You had to remap this=0A= > device to regular DDR AXI port intead of IOC AXI port.=0A= =0A= Why are we not doing that for the GPU as part of this series.=0A= =0A= > You also need to apply 3 following patches firstly:=0A= > https://www.mail-archive.com/linux-snps-arc@lists.infradead.org/msg03865.= html=0A= > https://www.mail-archive.com/linux-snps-arc@lists.infradead.org/msg03889.= html=0A= > https://www.mail-archive.com/linux-snps-arc@lists.infradead.org/msg03887.= html=0A= >=0A= > NOTE:=0A= > We don't touch any aperture configuration in this patch series. So we=0A= > don't switch any devices between IOC and non-IOC AXI ports on any board.= =0A= > It can be done later if it is required.=0A= >=0A= > Changes v1->v2 (Thanks to Christoph):=0A= > * Don't select DMA_DIRECT_OPS explicitly as it is already selected by=0A= > DMA_NONCOHERENT_OPS=0A= > * Remove check for HIGHMEM pages from arch_dma_{alloc, free}=0A= >=0A= > Eugeniy Paltsev (4):=0A= > ARC: DTS: mark DMA devices connected through IOC port as dma-coherent= =0A= > ARC: allow to use IOC and non-IOC DMA devices simultaneously=0A= > ARC: IOC: panic if both IOC and ZONE_HIGHMEM enabled=0A= > ARC: don't check for HIGHMEM pages in arch_dma_alloc=0A= >=0A= > arch/arc/boot/dts/axc003.dtsi | 26 ++++++++++++++++=0A= > arch/arc/boot/dts/axc003_idu.dtsi | 26 ++++++++++++++++=0A= > arch/arc/boot/dts/hsdk.dts | 4 +++=0A= > arch/arc/include/asm/dma-mapping.h | 13 ++++++++=0A= > arch/arc/mm/cache.c | 30 +++++++++---------=0A= > arch/arc/mm/dma.c | 62 +++++++++++++++++++-------------= ------=0A= > 6 files changed, 115 insertions(+), 46 deletions(-)=0A= > create mode 100644 arch/arc/include/asm/dma-mapping.h=0A= >=0A= =0A=