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To: Ramon Fried References: CC: , , , open list From: Kishon Vijay Abraham I Message-ID: <3ffbd957-a62f-b1ec-63b9-4ab3e03c8873@ti.com> Date: Tue, 14 Aug 2018 18:34:27 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Tuesday 14 August 2018 06:25 PM, Ramon Fried wrote: > On Tue, Aug 14, 2018 at 1:53 PM Kishon Vijay Abraham I wrote: >> >> Hi, >> >> On Tuesday 14 August 2018 06:19 PM, Ramon Fried wrote: >>> Hi. >>> I recently saw that the PCI endpoint API only supports outbound memory >>> mapping: (AXI -> PCI) through the map_addr op. >>> Why inbound mapping is missing (PCI->AXI) is missing ? >>> In almost all of the PCI EP controllers I've worked with there was a >>> need to map complete BARS or part of BARS to mmio/aperature regions on >>> the device. >> >> pci_epc_set_bar() is used for mapping BAR. > Thanks Kishon. > what about address mapping ? Synopsys has this functionality if I > recall correctly. The addresses that the RC will put in BAR's is not known while we initialize the endpoint. So we really can't map BAR's PCI address to an inbound address while EP initialization. I think some older version of Synopsys had this (and didn't have BAR mapping). Actually TI's K2G had this IP. However the ATU registers here are mapped to BAR0. So the host side PCI driver can program the PCI address (that the RC has allocated for BARs) in ATU. Thanks Kishon