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kernel.org; dkim=none (message not signed) header.d=none;kernel.org; dmarc=bestguesspass action=none header.from=cern.ch; Received-SPF: Pass (protection.outlook.com: domain of cern.ch designates 188.184.36.48 as permitted sender) receiver=protection.outlook.com; client-ip=188.184.36.48; helo=cernmxgwlb4.cern.ch; Received: from cernmxgwlb4.cern.ch (188.184.36.48) by VE1EUR02FT025.mail.protection.outlook.com (10.152.12.109) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA_P256) id 15.20.1059.14 via Frontend Transport; Fri, 17 Aug 2018 14:54:18 +0000 Received: from cernfe06.cern.ch (188.184.36.49) by cernmxgwlb4.cern.ch (188.184.36.48) with Microsoft SMTP Server (TLS) id 14.3.399.0; Fri, 17 Aug 2018 16:54:15 +0200 Received: from pcbe13614.localnet (2001:1458:202:121::100:40) by smtp.cern.ch (2001:1458:201:66::100:14) with Microsoft SMTP Server (TLS) id 14.3.399.0; Fri, 17 Aug 2018 16:54:17 +0200 From: Federico Vaga To: Alan Tull Reply-To: CC: Moritz Fischer , Jonathan Corbet , "Randy Dunlap" , Dinh Nguyen , "Appana Durga Kedareswara Rao" , linux-kernel , , "Linux Doc Mailing List" , Alan Tull , Matthew Gerlach Subject: Re: [PATCH 2/2] fpga: add FPGA manager debugfs Date: Fri, 17 Aug 2018 16:54:16 +0200 Message-ID: <3209150.S88njOrd88@pcbe13614> In-Reply-To: References: <20180815220958.3606-1-atull@kernel.org> <2759044.uKe7sI2ItL@pcbe13614> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; 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I'm putting on the > > table the point of view, mainly, of an user. If you say there are problems > > here or there I believe you. At the beginning, you did not say that this > > interface may introduce problems (and I'm interested in those problems > > since I > > implemented one and we are using it), but that you fear that it becomes > > the > > default (usually, being a default is a good thing). > > > > Since you and Alan are working on this for a long time, you can read each > > other mind, but I need a more verbose email to understand ^_^' > > > > Of course the interface must be safe, I totally agree. In order to make me > > understand what are the issues, can you list some of them? > > Before we repeat what the doc l posted says, could you look at it and > comment on what I'm not saying there? > > https://lkml.org/lkml/2018/8/15/525 I read it, but do you mean that the problems you foresee are only the ones listed in there? If this is so, comments: loading devices It is true that it is a problem, and probably it is clear to everyone who will try to use such interface: "and now how do I load my devices?". But this is only a possible case, the FPGA may run without device driver and in this case it is perfectly fine for production. If the answer to the above question is: "ok, let me see where my devices are in the memory ..." well if the machine crashes, it's their problem. This problem exists even without the FPGA manager. bridge My understand is that it is optional. Developers are allowed to not implement the bridge's operations. Which probably means that it does not exist or it is not needed. When an user uses this interface from userspace it shouldn't be hard to detect if the operation is risky or not (bridge enabled/disabled). And if it is risky, the operation fails with EPERM, EBUSY. I have to say that I'm not familiar with the bridge design, perhaps I'm missing something. Conclusions Yes, those are problems but I think they do not justify the label "not for production": in some cases I think is fine.