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Date:   Fri, 17 Aug 2018 10:00:02 -0600
From:   Lina Iyer <ilina@codeaurora.org>
To:     Marc Zyngier <marc.zyngier@arm.com>
Cc:     linux-kernel@vger.kernel.org, Thomas Gleixner <tglx@linutronix.de>,
        Sudeep Holla <sudeep.holla@arm.com>
Subject: Re: [PATCH] irqchip/gic-v3: Allow interrupt to be configured as
 wake-up sources
Message-ID: <20180817160002.GP5081@codeaurora.org>
References: <20180817091804.993-1-marc.zyngier@arm.com>
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On Fri, Aug 17 2018 at 03:18 -0600, Marc Zyngier wrote:
>Although GICv3 doesn't directly offers support for wake-up interrupts
>and relies on external HW for this, it shouldn't prevent the driver
>for such HW from doing it work.
>
>Let's set the required flags on the irq_chip structures.
>
>Reported-by: Lina Iyer <ilina@codeaurora.org>
>Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
>---
>Lina, please let me know how this goes. If that fixes your issues,
>I'll queue it as a fix for the current cycle.
>
Thanks for the quick turn around, Marc.

Tested-by: Lina Iyer <ilina@codeaurora.org>

> drivers/irqchip/irq-gic-v3.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
>index 76ea56d779a1..2d71c79bc698 100644
>--- a/drivers/irqchip/irq-gic-v3.c
>+++ b/drivers/irqchip/irq-gic-v3.c
>@@ -861,7 +861,9 @@ static struct irq_chip gic_chip = {
> 	.irq_set_affinity	= gic_set_affinity,
> 	.irq_get_irqchip_state	= gic_irq_get_irqchip_state,
> 	.irq_set_irqchip_state	= gic_irq_set_irqchip_state,
>-	.flags			= IRQCHIP_SET_TYPE_MASKED,
>+	.flags			= IRQCHIP_SET_TYPE_MASKED |
>+				  IRQCHIP_SKIP_SET_WAKE |
>+				  IRQCHIP_MASK_ON_SUSPEND,
> };
>
> static struct irq_chip gic_eoimode1_chip = {
>@@ -874,7 +876,9 @@ static struct irq_chip gic_eoimode1_chip = {
> 	.irq_get_irqchip_state	= gic_irq_get_irqchip_state,
> 	.irq_set_irqchip_state	= gic_irq_set_irqchip_state,
> 	.irq_set_vcpu_affinity	= gic_irq_set_vcpu_affinity,
>-	.flags			= IRQCHIP_SET_TYPE_MASKED,
>+	.flags			= IRQCHIP_SET_TYPE_MASKED |
>+				  IRQCHIP_SKIP_SET_WAKE |
>+				  IRQCHIP_MASK_ON_SUSPEND,
> };
>
> #define GIC_ID_NR		(1U << gic_data.rdists.id_bits)
>--
>2.18.0
>