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[209.132.180.67]) by mx.google.com with ESMTP id r6-v6si7552325pgp.591.2018.08.19.16.23.23; Sun, 19 Aug 2018 16:23:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=jeG2iHxo; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726617AbeHTCcl (ORCPT + 99 others); Sun, 19 Aug 2018 22:32:41 -0400 Received: from mail.kernel.org ([198.145.29.99]:48890 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726397AbeHTCck (ORCPT ); Sun, 19 Aug 2018 22:32:40 -0400 Received: from localhost.localdomain (cpe-174-109-247-98.nc.res.rr.com [174.109.247.98]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C2A0C20C51; Sun, 19 Aug 2018 23:19:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1534720769; bh=44y+9eoZ90iQR+zBtghnOOSlPhHHwCSUKtXKQt94PbY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jeG2iHxoUOcD5d7Id3mTuI5Tnoz0Akfeq/gyq3kk9WbB75MkTOmQPdNLAWzWtduRU cUZ+87gPMKVAJDiEaPXNszLixyUweFWQIrOkyT6o5wkKVSp9rrIZO9txIzNAkKiTCi pC2mmypc7mbrLvaGpiv/cKvBKhdjDr3VR2hHScSg= From: Sinan Kaya To: linux-pci@vger.kernel.org Cc: Sinan Kaya , Bjorn Helgaas , Lukas Wunner , Andy Shevchenko , Mika Westerberg , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v8 2/2] PCI: pciehp: Mask AER surprise link down error if hotplug is enabled Date: Fri, 17 Aug 2018 23:51:10 -0700 Message-Id: <20180818065126.77912-2-okaya@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180818065126.77912-1-okaya@kernel.org> References: <20180818065126.77912-1-okaya@kernel.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org PCIe Spec 3.0. 7.10.2. Uncorrectable Error Status Register (Offset 04h) defines link down errors as an AER error as bit 5 Surprise Down Error Status. If hotplug is supported by a particular port, we want hotplug driver to handle the link down/up conditions via Data Link Layer Active interrupt rather than the AER error interrupt. Mask the Surprise Down Error during hotplug driver and re-enable it during remove. Signed-off-by: Sinan Kaya --- drivers/pci/hotplug/pciehp_core.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c index ec48c9433ae5..8322db8f369a 100644 --- a/drivers/pci/hotplug/pciehp_core.c +++ b/drivers/pci/hotplug/pciehp_core.c @@ -229,6 +229,29 @@ static void pciehp_check_presence(struct controller *ctrl) up_read(&ctrl->reset_lock); } +static int pciehp_control_surprise_error(struct controller *ctrl, bool enable) +{ + struct pci_dev *pdev = ctrl->pcie->port; + u32 reg32; + int pos; + + if (!pci_is_pcie(pdev)) + return -ENODEV; + + pos = pdev->aer_cap; + if (!pos) + return -ENODEV; + + pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_MASK, ®32); + if (enable) + reg32 &= ~PCI_ERR_UNC_SURPDN; + else + reg32 |= PCI_ERR_UNC_SURPDN; + pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_MASK, reg32); + + return 0; +} + static int pciehp_probe(struct pcie_device *dev) { int rc; @@ -280,6 +303,9 @@ static int pciehp_probe(struct pcie_device *dev) pciehp_check_presence(ctrl); + /* We want exclusive control of link down events in hotplug driver */ + pciehp_control_surprise_error(ctrl, false); + return 0; err_out_shutdown_notification: @@ -298,6 +324,7 @@ static void pciehp_remove(struct pcie_device *dev) pci_hp_del(ctrl->slot->hotplug_slot); pcie_shutdown_notification(ctrl); cleanup_slot(ctrl); + pciehp_control_surprise_error(ctrl, true); pciehp_release_ctrl(ctrl); } -- 2.17.1