Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp5358859imm; Tue, 21 Aug 2018 10:20:16 -0700 (PDT) X-Google-Smtp-Source: AA+uWPzYDxHJny5Z4WZdF+ZgTmBfu5zqWSO3PVAK5KMUE57D77PTZUKNSIJFceRrf4BaCzJVLuZS X-Received: by 2002:a63:481:: with SMTP id 123-v6mr18045008pge.129.1534872016113; Tue, 21 Aug 2018 10:20:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1534872016; cv=none; d=google.com; s=arc-20160816; b=EfbC+LligCsX/wrshPQwRyKrd9Lan01v35nQNOajw1mUSipgPKYRMYB0RP4Qes1Bbm oCA+bwa/wxg9Pz/gWZ/IXDibDu5mQivbyCkG2nP4wua3NM4haRicl5dQ7VMb7Sk0Kl6O BXBKSHGEiYFNrYnXZXIdTkowZgNZTT9V2nTo/RW3o/pcM0/2305h0aVYVf9wr+7yhg5N At0kUfyuSXF9+KpZxqAt8P809FEog5GKDvALgnwaZXDAk4gkZV8Ih5WqfbUlyyuOaiLj 4UvR6Sa/0q2scmDnl3Ix7U8BFKotr/ZdT9fsy6U6adYkyXVn3IJPMX8aW//8RmGTSnma NZhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:dkim-signature:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=7I9XfwWNevUXmYZFDHmdVij5bb+H8OkNxYvkQRyAS5U=; b=XDLuX4cbVgOqSCiWsIfTUMbSaLjYPVXwFl0DlD/NqXNg5HuZYIuCv2LRHjjBjA7JSR QW+OkQmbqoj0C7P2v5FBX6Bm2xU8Rdl1kfP/hQQBanXpiHUq0ScZPtlciOgCOj7Pg8vN 0nlOqC7Jh9yJAJheYhCC+yzZKQBbCYG339LVDW7cn4a590x7ueJVjBkVayIeTr86qG9r hc5YolQnnZb7llL9/WZ1fZMKhTH02IEot0zSFMwvH27mJNPf11cUH/5xEozNptRe+Dl4 TGUcxkE5v1xhWsjONWUwUrrfMwZhXbvOpWr4nKzDfVpRvUfqv2lm+Oisj8oU6icR8P51 BgKA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@crapouillou.net header.s=mail header.b=o0EQFfWZ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 69-v6si13755930plc.388.2018.08.21.10.20.01; Tue, 21 Aug 2018 10:20:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@crapouillou.net header.s=mail header.b=o0EQFfWZ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728258AbeHUUiO (ORCPT + 99 others); Tue, 21 Aug 2018 16:38:14 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:33106 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728205AbeHUUiM (ORCPT ); Tue, 21 Aug 2018 16:38:12 -0400 From: Paul Cercueil To: Thomas Gleixner , Daniel Lezcano , Rob Herring , Thierry Reding , Mark Rutland , Ralf Baechle , Paul Burton , Jonathan Corbet Cc: od@zcrc.me, Mathieu Malaterre , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-mips@linux-mips.org, linux-doc@vger.kernel.org, linux-clk@vger.kernel.org, Paul Cercueil Subject: [PATCH v7 13/24] pwm: jz4740: Allow selection of PWM channels 0 and 1 Date: Tue, 21 Aug 2018 19:16:24 +0200 Message-Id: <20180821171635.22740-14-paul@crapouillou.net> In-Reply-To: <20180821171635.22740-1-paul@crapouillou.net> References: <20180821171635.22740-1-paul@crapouillou.net> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1534871830; bh=7I9XfwWNevUXmYZFDHmdVij5bb+H8OkNxYvkQRyAS5U=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=o0EQFfWZkyVeR1tZV/q/2z/c9cEK6cD0q8NHgKZRTPq2QqYqdXJzuRGvAZhKdxN+t09RUSGvEGg1xoVZt8DvX3pby4vexNnk6YfCdqPpbgPDvCjXF4p0gHZ1C9bTfL/KE4Dm2Y6/Bb/bOUL+MjNidM/twOMAtWGz7c38kqiNIFA= Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The TCU channels 0 and 1 were previously reserved for system tasks, and thus unavailable for PWM. This commit uses the newly introduced API functions of the ingenic-timer driver to request/release the TCU channels that should be used as PWM. This allows all the TCU channels to be used as PWM. Signed-off-by: Paul Cercueil --- Notes: v6: New patch v7: No change drivers/pwm/pwm-jz4740.c | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/drivers/pwm/pwm-jz4740.c b/drivers/pwm/pwm-jz4740.c index 1bda8d8e9865..d08274ec007f 100644 --- a/drivers/pwm/pwm-jz4740.c +++ b/drivers/pwm/pwm-jz4740.c @@ -43,27 +43,30 @@ static int jz4740_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) char clk_name[16]; int ret; - /* - * Timers 0 and 1 are used for system tasks, so they are unavailable - * for use as PWMs. - */ - if (pwm->hwpwm < 2) - return -EBUSY; + ret = ingenic_tcu_request_channel(pwm->hwpwm); + if (ret) + return ret; snprintf(clk_name, sizeof(clk_name), "timer%u", pwm->hwpwm); clk = clk_get(chip->dev, clk_name); - if (IS_ERR(clk)) - return PTR_ERR(clk); + if (IS_ERR(clk)) { + ret = PTR_ERR(clk); + goto err_free_channel; + } ret = clk_prepare_enable(clk); - if (ret) { - clk_put(clk); - return ret; - } + if (ret) + goto err_clk_put; jz->clks[pwm->hwpwm] = clk; return 0; + +err_clk_put: + clk_put(clk); +err_free_channel: + ingenic_tcu_release_channel(pwm->hwpwm); + return ret; } static void jz4740_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) @@ -73,6 +76,7 @@ static void jz4740_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) clk_disable_unprepare(clk); clk_put(clk); + ingenic_tcu_release_channel(pwm->hwpwm); } static int jz4740_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) -- 2.11.0