Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp5849imm; Tue, 21 Aug 2018 13:33:28 -0700 (PDT) X-Google-Smtp-Source: AA+uWPxant68x8Wdud7POVLdWcYhyJQ9aPfG9Sk1uxmujIIthxEBUQksM1CSKDH5mB+cuMZg1qms X-Received: by 2002:a17:902:8b8b:: with SMTP id ay11-v6mr6103299plb.1.1534883608486; Tue, 21 Aug 2018 13:33:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1534883608; cv=none; d=google.com; s=arc-20160816; b=hIeCVGVyxNqM98KNNPLzMIB9WQ0UeqwMdurJx6kw1GSLJZfNn70DCFMz2cNgvM1O4z BmpeRqP4hyIQxBJAqeptDvuO7y8AoauqC/6q1Uw0lHhIzdFcgArVwlZqiYQ0qlDyxe4K 6/0cEgPCinUIrTZ9JPFAWPqNMvHEoUz+igbmqfPwLigtzsKFYKzEsIxsoHpXli7mYP4v oajDWWOFjbvWRoSiN1Ttf2/L069V8OQJwki3fpVEUL/6spC2kZIhJ4QnNJpcW2Fqp4Rx eKpn7dkqPrRLaCZ9kqdXnkhHJ0+b9LBfAsTAYrDNuhvl5StNrRIuZBaTVwe6cmWhW/Pv 0Cag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:from:subject:cc:to:message-id:date :arc-authentication-results; bh=T+UbAwMVupPaClwwsCO9Sp58Ey6CxrHZwmfBPL5hVcs=; b=ws9TePuTQZl3wCGWgzWZf/11kHvoEUSg0eP2v0Q54SJIeIIPoQo9XTVo/cJn+Yas2h 7PCm3hXAVnetn8PH+nPGlWuVUD/NkSPnUyt1p42/fpb8og+4w91VBqagOA/pPL3srrOr mHnckduNyCKDwV0CcupVrCGkVhkDKv4WZAGEpTKjN9q4Rx1WPgzUix9pCvH7yPpXC91H 7mhoj1X6HNj0P5sTF3nANFobcCbc4WwcZwD9BvtQy5iBvkfhPWd65T+p+hJ/6vdG0/iP AOWuoGHaqWH3Qj8uIK/I9Jm1UEv6I6kJlBS3FVYYuvhq8zZZ1TK10Cv45JnVnEl7uTDv WvLg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q145-v6si14009516pfq.315.2018.08.21.13.32.49; Tue, 21 Aug 2018 13:33:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727529AbeHUWwg (ORCPT + 99 others); Tue, 21 Aug 2018 18:52:36 -0400 Received: from shards.monkeyblade.net ([23.128.96.9]:34648 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726703AbeHUWwg (ORCPT ); Tue, 21 Aug 2018 18:52:36 -0400 Received: from localhost (71-36-117-41.ptld.qwest.net [71.36.117.41]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) (Authenticated sender: davem-davemloft) by shards.monkeyblade.net (Postfix) with ESMTPSA id C1E34144D3973; Tue, 21 Aug 2018 12:31:08 -0700 (PDT) Date: Tue, 21 Aug 2018 12:31:08 -0700 (PDT) Message-Id: <20180821.123108.89921430801253333.davem@davemloft.net> To: hkallweit1@gmail.com Cc: helgaas@kernel.org, jian-hong@endlessm.com, nic_swsd@realtek.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux@endlessm.com, linux-pci@vger.kernel.org, marc.zyngier@arm.com, tglx@linutronix.de, hch@lst.de Subject: Re: [PATCH] r8169: don't use MSI-X on RTL8106e From: David Miller In-Reply-To: <9d7d960a-6c55-dc4b-7969-f5cf46bff0ce@gmail.com> References: <20180820184438.GA154536@bhelgaas-glaptop.roam.corp.google.com> <9d7d960a-6c55-dc4b-7969-f5cf46bff0ce@gmail.com> X-Mailer: Mew version 6.7 on Emacs 26 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.5.12 (shards.monkeyblade.net [149.20.54.216]); Tue, 21 Aug 2018 12:31:09 -0700 (PDT) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Heiner Kallweit Date: Mon, 20 Aug 2018 22:46:48 +0200 > I'm in contact with Realtek and according to them few chip versions > seem to clear MSI-X table entries on resume from suspend. Checking > with them how this could be fixed / worked around. > Worst case we may have to disable MSI-X in general. I worry that if the chip does this, and somehow MSI-X is enabled and an interrupt is generated, the chip will write to the cleared out MSI-X address. This will either write garbage into memory or cause a bus error and require PCI error recovery. It also looks like your test patch doesn't fix things for people who have tested it. Hmmm...