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[209.132.180.67]) by mx.google.com with ESMTP id y10-v6si1604616pgv.290.2018.08.22.06.21.05; Wed, 22 Aug 2018 06:21:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729056AbeHVQny (ORCPT + 99 others); Wed, 22 Aug 2018 12:43:54 -0400 Received: from smtp20.cstnet.cn ([159.226.251.20]:39689 "EHLO cstnet.cn" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728886AbeHVQny (ORCPT ); Wed, 22 Aug 2018 12:43:54 -0400 Received: from [172.20.20.131] (unknown [182.150.46.145]) by APP-10 (Coremail) with SMTP id tACowADn7mKwYn1birdvAw--.2642S2; Wed, 22 Aug 2018 21:18:41 +0800 (CST) Subject: Re: [PATCH v4 15/16] driver/edac: enable Hygon support to AMD64 EDAC driver To: Pavel Machek , Borislav Petkov Cc: Paolo Bonzini , tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, thomas.lendacky@amd.com, mchehab@kernel.org, mikhail.jin@gmail.com, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-edac@vger.kernel.org References: <6275a5a0a0cfbd2c1abc09a5bb41caabecd02e27.1534599097.git.puwen@hygon.cn> <20180821081331.GC24940@nazgul.tnic> <20180821112020.GB29972@nazgul.tnic> <6e17958a-6cd8-4c6c-c890-f5f48b084d6f@redhat.com> <20180821130430.GB30528@nazgul.tnic> <20180821180743.GA14431@atrey.karlin.mff.cuni.cz> From: Pu Wen Message-ID: <3be72c3c-1177-886f-8cbc-dec49905ca95@hygon.cn> Date: Wed, 22 Aug 2018 21:18:40 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20180821180743.GA14431@atrey.karlin.mff.cuni.cz> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-CM-TRANSID: tACowADn7mKwYn1birdvAw--.2642S2 X-Coremail-Antispam: 1UD129KBjvJXoWrKry5Ww43WF4rXrWfGw18AFb_yoW8JF15pr y5KryUZrWktF4I9rs7Gw47JFyFvay5tw4qk39Ykw4Uu3y3Zr1UuFWfKay0qFZ7GrsYgFW7 AFWjvrn7Ga4kZFJanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUU9jb7Iv0xC_KF4lb4IE77IF4wAFF20E14v26r4j6ryUM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rw A2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Jr0_JF4l84ACjcxK6xII jxv20xvEc7CjxVAFwI0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVWUJVW8JwA2z4x0Y4vEx4 A2jsIEc7CjxVAFwI0_Gr0_Gr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI 64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1Y6r17McIj6I8E87Iv67AKxVW8Jr0_Cr 1UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvEwIxGrwACI402YVCY1x02628vn2kIc2xK xwCYjI0SjxkI62AI1cAE67vIY487MxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r 1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CE b7AF67AKxVWUtVW8ZwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1j6r1xMIIF0x vE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwCI42IY6xAIw20EY4v20xvaj40_Wr1j6rW3Jr1l IxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x0267AKxVW8JVW8JrUvcSsGvf C2KfnxnUUI43ZEXa7IU8Oo7tUUUUU== X-Originating-IP: [182.150.46.145] X-CM-SenderInfo: psxzv046klw03qof0z/ Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2018/8/22 2:07, Pavel Machek wrote>> But for right now I think we should strive to keep the changes as small >> as possible and only do real splitting when they start adding new >> functionality. Which would mean having a hygon_edac.c too, for example. >> >> All, IMHO, of course. Sharing code between vendors is always yucky. > > Dunno, people do not know that 0x18 is reserved on AMD, so resulting > code is quite confusing. > > Explicit vendor check is way to go, long term. > Pavel Hi Pavel, For amd64_edac_init() entry, there will be a x86_match_cpu(amd64_cpuids) which checking whether amd64_edac module fit current CPU. Only Hygon has registered X86_VENDOR_HYGON with family 0x18h in amd64_cpuids[] to use AMD edac codes. Also with the assumption that Hygon will negotiate with AMD that only Hygon will use Family 18h. So we assume in later codes vendor checking can be omitted. You are right, for short term, we are trying to keep the tight change and enable Dhyana with minimal effort. For long term, agreed with that. So based on the assumption that only Hygon will use family 0x18, we will rework the patch, make the assumption clear and try to keep it small. If that's ok, we will rework this patch. Thanks for all the suggestions. Regards, Pu Wen