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Wed, 22 Aug 2018 18:43:37 +0200 Received: from [10.0.2.15] (10.107.25.72) by DE02WEHTCB.internal.synopsys.com (10.225.19.80) with Microsoft SMTP Server (TLS) id 14.3.361.1; Wed, 22 Aug 2018 18:43:36 +0200 Subject: Re: [PATCH v6 01/10] i3c: Add core I3C infrastructure To: Boris Brezillon , Wolfram Sang , , Jonathan Corbet , , Greg Kroah-Hartman , Arnd Bergmann CC: Przemyslaw Sroka , Arkadiusz Golec , Alan Douglas , Bartosz Folta , Damian Kos , Alicja Jurasik-Urbaniak , Cyprian Wronka , Suresh Punnoose , Rafal Ciepiela , Thomas Petazzoni , Nishanth Menon , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , "Kumar Gala" , , , Vitor Soares , Geert Uytterhoeven , Linus Walleij , Xiang Lin , , Sekhar Nori , Przemyslaw Gaj , Peter Rosin References: <20180719152930.3715-1-boris.brezillon@bootlin.com> <20180719152930.3715-2-boris.brezillon@bootlin.com> From: vitor Message-ID: Date: Wed, 22 Aug 2018 17:43:34 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20180719152930.3715-2-boris.brezillon@bootlin.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-Originating-IP: [10.107.25.72] Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Boris, On 19-07-2018 16:29, Boris Brezillon wrote: > +int i3c_bus_register(struct i3c_bus *i3cbus) > +{ > + struct i2c_dev_desc *desc; > + > + i3c_bus_for_each_i2cdev(i3cbus, desc) { > + switch (desc->boardinfo->lvr & I3C_LVR_I2C_INDEX_MASK) { > + case I3C_LVR_I2C_INDEX(0): > + if (i3cbus->mode < I3C_BUS_MODE_MIXED_FAST) > + i3cbus->mode = I3C_BUS_MODE_MIXED_FAST; > + break; > + > + case I3C_LVR_I2C_INDEX(1): > + case I3C_LVR_I2C_INDEX(2): > + if (i3cbus->mode < I3C_BUS_MODE_MIXED_SLOW) > + i3cbus->mode = I3C_BUS_MODE_MIXED_SLOW; > + break; > + > + default: > + return -EINVAL; > + } > + } > + > + if (!i3cbus->scl_rate.i3c) > + i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; > + > + if (!i3cbus->scl_rate.i2c) { > + if (i3cbus->mode == I3C_BUS_MODE_MIXED_SLOW) > + i3cbus->scl_rate.i2c = I3C_BUS_I2C_FM_SCL_RATE; > + else > + i3cbus->scl_rate.i2c = I3C_BUS_I2C_FM_PLUS_SCL_RATE; > + } > + > + /* > + * I3C/I2C frequency may have been overridden, check that user-provided > + * values are not exceeding max possible frequency. > + */ > + if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE || > + i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE) { > + return -EINVAL; > + } > + > + dev_set_name(&i3cbus->dev, "i3c-%d", i3cbus->id); > + > + return device_add(&i3cbus->dev); > +} During the tests of the bus with i2c devices I found the i2c_dev_desc objects aren't allocated before this function. This cause i3cbus->mode = I3C_BUS_MODE_PURE. I want to do something for the slave and secondary master, do you already have infrastructure that you can share? Best regards, Vitor Soares