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[209.132.180.67]) by mx.google.com with ESMTP id n63-v6si7121086pgn.187.2018.08.24.02.23.23; Fri, 24 Aug 2018 02:23:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ABaxn2j6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727599AbeHXMyf (ORCPT + 99 others); Fri, 24 Aug 2018 08:54:35 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:36656 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726842AbeHXMye (ORCPT ); Fri, 24 Aug 2018 08:54:34 -0400 Received: by mail-pl1-f195.google.com with SMTP id e11-v6so852464plb.3 for ; Fri, 24 Aug 2018 02:20:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UBJImci8KZxRNTfmSw+GGOxU7hKy71vSboxL1xbPDzw=; b=ABaxn2j6d871/4FwgGuV1TemB+Sy+ByjCZoLtNYaOCY4r65N/0yqbPdRx4k7WA2VTx DiBxKmnrRFZvVdhWUJiJsDfnU8/6V5jp9EjHBuaUGH5iw6nKVxyLy9uI6Amvq6uu4t/J Ui9en7q0CdLA7oA8NkqgV8s8dNaFj2UWTF5uU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UBJImci8KZxRNTfmSw+GGOxU7hKy71vSboxL1xbPDzw=; b=XUOHsltBUvT1OLRsQGK81xUiSuG8cj5JWA316Kg71G7SrJVfDy5w6PnHyPBCIqWeNf WjsFL8LWowxK3r2weTAm4fIYavs6LRAIf4cDBNmbV4cmJR53WFfuVQ++nwni4MSLmqbz CMgyXU1LFNPVvzJgA2b1i/y6ags99O61xeTi1QsQoTlZxRSwoJHuYloF8djdbkMHO74s EO3PirJ5uBH6tIum6LPlupfQ2TY7eJoMidCt1/ucimDQnD0EsiWqFWStVCLOFw65xFd2 IZG/T6phchRPKTVvA97n+B5FbwaelJL3TXjoVQvKur1cbXgY+v6R2ZiX87aa/LM0dx5v LUwQ== X-Gm-Message-State: APzg51BVglWxlha+VGQl9Qg2y6PRq2DiCCV9qK92i1ua2pDHnjpb7E2c PmRiNO6hVRIVtmKBh9vEIHQK0g== X-Received: by 2002:a17:902:7683:: with SMTP id m3-v6mr886597pll.255.1535102448934; Fri, 24 Aug 2018 02:20:48 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id g6-v6sm9520314pfb.11.2018.08.24.02.20.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 Aug 2018 02:20:48 -0700 (PDT) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Billows Wu , Jason Wu , Chunyan Zhang , Chunyan Zhang Subject: [PATCH V6 1/9] mmc: sdhci: Add version V4 definition Date: Fri, 24 Aug 2018 17:20:20 +0800 Message-Id: <1535102428-20332-2-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1535102428-20332-1-git-send-email-zhang.chunyan@linaro.org> References: <1535102428-20332-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Added definitions for v400, v410, v420. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci.c | 2 +- drivers/mmc/host/sdhci.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 8793340..f70135c 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -3501,7 +3501,7 @@ int sdhci_setup_host(struct sdhci_host *host) override_timeout_clk = host->timeout_clk; - if (host->version > SDHCI_SPEC_300) { + if (host->version > SDHCI_SPEC_420) { pr_err("%s: Unknown controller version (%d). You may experience problems.\n", mmc_hostname(mmc), host->version); } diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 5db81de..7ae95f8 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -270,6 +270,9 @@ #define SDHCI_SPEC_100 0 #define SDHCI_SPEC_200 1 #define SDHCI_SPEC_300 2 +#define SDHCI_SPEC_400 3 +#define SDHCI_SPEC_410 4 +#define SDHCI_SPEC_420 5 /* * End of controller registers. -- 2.7.4