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From:   Jolly Shah <JOLLYS@xilinx.com>
To:     Rob Herring <robh@kernel.org>
CC:     "matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
        "andy.gross@linaro.org" <andy.gross@linaro.org>,
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Subject: RE: [PATCH v2 1/3] dt-bindings: soc: Add ZynqMP PM bindings
Thread-Topic: [PATCH v2 1/3] dt-bindings: soc: Add ZynqMP PM bindings
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Date:   Fri, 24 Aug 2018 22:15:13 +0000
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Hi Rob,

> -----Original Message-----
> From: Rob Herring [mailto:robh@kernel.org]
> Sent: Monday, August 20, 2018 12:49 PM
> To: Jolly Shah <JOLLYS@xilinx.com>
> Cc: matthias.bgg@gmail.com; andy.gross@linaro.org; shawnguo@kernel.org;
> geert+renesas@glider.be; bjorn.andersson@linaro.org;
> sean.wang@mediatek.com; m.szyprowski@samsung.com; Michal Simek
> <michals@xilinx.com>; mark.rutland@arm.com; Rajan Vaja
> <RAJANV@xilinx.com>; devicetree@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Rajan Vaja
> <RAJANV@xilinx.com>; Jolly Shah <JOLLYS@xilinx.com>
> Subject: Re: [PATCH v2 1/3] dt-bindings: soc: Add ZynqMP PM bindings
>=20
> On Mon, Aug 20, 2018 at 02:40:57PM -0500, Rob Herring wrote:
> > On Thu, Aug 16, 2018 at 12:08:01PM -0700, Jolly Shah wrote:
> > > From: Rajan Vaja <rajan.vaja@xilinx.com>
> > >
> > > Add documentation to describe Xilinx ZynqMP power management
> > > bindings.
> > >
> > > Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
> > > Signed-off-by: Jolly Shah <jollys@xilinx.com>
> > > ---
> > >  .../bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt    | 16
> ++++++++++++++++
>=20
> Also, this should be located in bindings/power/reset/

Base firmware node has clock subnode too. Do you still suggest to move bind=
ings to "bindings/power/reset/" or keep it=20
under "bindings/firmware" ?

Thanks,
Jolly Shah

>=20
> > >  1 file changed, 16 insertions(+)
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firm
> > > ware.txt
> > > b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firm
> > > ware.txt
> > > index d215d15..cb9a6b7 100644
> > > ---
> > > a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firm
> > > ware.txt
> > > +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-
> > > +++ firmware.txt
> > > @@ -64,6 +64,17 @@ Output clocks are registered based on clock
> > > information received  from firmware. Output clocks indexes are
> > > mentioned in  include/dt-bindings/clock/xlnx,zynqmp-clk.h.
> > >
> > > +-------------------------------------------------------------------
> > > +- Device Tree Bindings for the Xilinx Zynq MPSoC Power Management
> > > +-------------------------------------------------------------------
> > > +- The zynqmp-power node describes the power management
> > > +configurations.
> > > +It will control remote suspend/shutdown interfaces.
> > > +
> > > +Required properties:
> > > + - compatible:		Must contain:	"xlnx,zynqmp-power"
> > > + - interrupt-parent:	Interrupt controller the interrupt is routed th=
rough
> >
> > interrupt-parent is implied and could be in a parent node, so remove.
> >
> > With that,
> >
> > Reviewed-by: Rob Herring <robh@kernel.org>
> >
> > > + - interrupts:		Interrupt specifier
> > > +
> > >  -------
> > >  Example
> > >  -------
> > > @@ -78,5 +89,10 @@ firmware {
> > >  			clocks =3D <&pss_ref_clk>, <&video_clk>,
> <&pss_alt_ref_clk>, <&aux_ref_clk>, <&gt_crx_ref_clk>;
> > >  			clock-names =3D "pss_ref_clk", "video_clk",
> "pss_alt_ref_clk","aux_ref_clk", "gt_crx_ref_clk";
> > >  		};
> > > +		zynqmp_power: zynqmp-power {
> > > +			compatible =3D "xlnx,zynqmp-power";
> > > +			interrupt-parent =3D <&gic>;
> > > +			interrupts =3D <0 35 4>;
> > > +		};
> > >  	};
> > >  };
> > > --
> > > 2.7.4
> > >