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[209.132.180.67]) by mx.google.com with ESMTP id f91-v6si13838236plf.376.2018.08.26.22.35.22; Sun, 26 Aug 2018 22:35:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=WATqEyeS; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726887AbeH0JTY (ORCPT + 99 others); Mon, 27 Aug 2018 05:19:24 -0400 Received: from mail.kernel.org ([198.145.29.99]:49652 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726772AbeH0JTY (ORCPT ); Mon, 27 Aug 2018 05:19:24 -0400 Received: from localhost (unknown [106.200.197.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 5F1D22152E; Mon, 27 Aug 2018 05:34:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1535348058; bh=gpzxJS/54UNXMXvA2zfkDjZHMlTrIXyTwfj4WyexzjQ=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=WATqEyeSGKMWgh6r3WyLCeZXDZsnnXsRs2zM5FuFyVlzG06vYrZA4u0tdWntX2+QE QIShSsOYx45BRfkWODZF2qg+D8d6o8+GfN5uhjYhI/PPH9Hh78UmSAvIzbTHG97X3X SoM0JwEY59SVMfJ1SEBynrJ0/A0L1uUzSaXI6ZOo= Date: Mon, 27 Aug 2018 11:04:09 +0530 From: Vinod To: Andrea Merello Cc: dan.j.williams@intel.com, michal.simek@xilinx.com, appana.durga.rao@xilinx.com, dmaengine@vger.kernel.org, v4-000linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, radhey.shyam.pandey@xilinx.com Subject: Re: [PATCH v4 5/7] dmaengine: xilinx_dma: autodetect whether the HW supports scatter-gather Message-ID: <20180827053409.GV2388@vkoul-mobl> References: <20180802141012.19970-1-andrea.merello@gmail.com> <20180802141012.19970-5-andrea.merello@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180802141012.19970-5-andrea.merello@gmail.com> User-Agent: Mutt/1.9.2 (2017-12-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 02-08-18, 16:10, Andrea Merello wrote: > The AXIDMA and CDMA HW can be either direct-access or scatter-gather > version. These are SW incompatible. > > The driver can handle both versions: a DT property was used to > tell the driver whether to assume the HW is in scatter-gather mode. > > This patch makes the driver to autodetect this information. The DT > property is not required anymore. > > No changes for VDMA. > > Cc: Rob Herring > Cc: Mark Rutland > Cc: devicetree@vger.kernel.org > Cc: Radhey Shyam Pandey > Signed-off-by: Andrea Merello > Reviewed-by: Radhey Shyam Pandey > --- > Changes in v2: > - autodetect only in !VDMA case > Changes in v3: > - cc DT maintainers/ML > Changes in v4: > - fix typos in commit message > --- > drivers/dma/xilinx/xilinx_dma.c | 14 ++++++++++---- So you are not removing this property from binding document? Or are there variants which dont have hw mechanism? > 1 file changed, 10 insertions(+), 4 deletions(-) > > diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c > index b17f24e4ec35..78d0f2f8225e 100644 > --- a/drivers/dma/xilinx/xilinx_dma.c > +++ b/drivers/dma/xilinx/xilinx_dma.c > @@ -86,6 +86,7 @@ > #define XILINX_DMA_DMASR_DMA_DEC_ERR BIT(6) > #define XILINX_DMA_DMASR_DMA_SLAVE_ERR BIT(5) > #define XILINX_DMA_DMASR_DMA_INT_ERR BIT(4) > +#define XILINX_DMA_DMASR_SG_MASK BIT(3) > #define XILINX_DMA_DMASR_IDLE BIT(1) > #define XILINX_DMA_DMASR_HALTED BIT(0) > #define XILINX_DMA_DMASR_DELAY_MASK GENMASK(31, 24) > @@ -407,7 +408,6 @@ struct xilinx_dma_config { > * @dev: Device Structure > * @common: DMA device structure > * @chan: Driver specific DMA channel > - * @has_sg: Specifies whether Scatter-Gather is present or not > * @mcdma: Specifies whether Multi-Channel is present or not > * @flush_on_fsync: Flush on frame sync > * @ext_addr: Indicates 64 bit addressing is supported by dma device > @@ -427,7 +427,6 @@ struct xilinx_dma_device { > struct device *dev; > struct dma_device common; > struct xilinx_dma_chan *chan[XILINX_DMA_MAX_CHANS_PER_DEVICE]; > - bool has_sg; > bool mcdma; > u32 flush_on_fsync; > bool ext_addr; > @@ -2400,7 +2399,6 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, > > chan->dev = xdev->dev; > chan->xdev = xdev; > - chan->has_sg = xdev->has_sg; > chan->desc_pendingcount = 0x0; > chan->ext_addr = xdev->ext_addr; > /* This variable ensures that descriptors are not > @@ -2493,6 +2491,15 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, > chan->stop_transfer = xilinx_dma_stop_transfer; > } > > + /* check if SG is enabled (only for AXIDMA and CDMA) */ > + if (xdev->dma_config->dmatype != XDMA_TYPE_VDMA) { > + if (dma_ctrl_read(chan, XILINX_DMA_REG_DMASR) & > + XILINX_DMA_DMASR_SG_MASK) > + chan->has_sg = true; > + dev_dbg(chan->dev, "ch %d: SG %s\n", chan->id, > + chan->has_sg ? "enabled" : "disabled"); > + } > + > /* Initialize the tasklet */ > tasklet_init(&chan->tasklet, xilinx_dma_do_tasklet, > (unsigned long)chan); > @@ -2631,7 +2638,6 @@ static int xilinx_dma_probe(struct platform_device *pdev) > return PTR_ERR(xdev->regs); > > /* Retrieve the DMA engine properties from the device tree */ > - xdev->has_sg = of_property_read_bool(node, "xlnx,include-sg"); > xdev->max_buffer_len = GENMASK(XILINX_DMA_MAX_TRANS_LEN_MAX - 1, 0); > > if (xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) { > -- > 2.17.1 -- ~Vinod