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[217.229.28.128]) by smtp.gmail.com with ESMTPSA id v7-v6sm492616wrr.19.2018.08.28.03.47.56 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 28 Aug 2018 03:47:56 -0700 (PDT) Date: Tue, 28 Aug 2018 12:47:55 +0200 From: Thierry Reding To: Dmitry Osipenko Cc: Rob Herring , Joerg Roedel , Robin Murphy , Jonathan Hunter , iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 06/19] dt-bindings: memory: tegra: Squash tegra20-gart into tegra20-mc Message-ID: <20180828104755.GC9386@ulmo> References: <20180818155430.5586-1-digetx@gmail.com> <20180818155430.5586-7-digetx@gmail.com> <20180820191209.GA28618@bogus> <4538309b-fcb3-73ee-04e3-6cefcedd376d@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="w7PDEPdKQumQfZlR" Content-Disposition: inline In-Reply-To: <4538309b-fcb3-73ee-04e3-6cefcedd376d@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --w7PDEPdKQumQfZlR Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Aug 20, 2018 at 10:35:54PM +0300, Dmitry Osipenko wrote: > On 20.08.2018 22:27, Dmitry Osipenko wrote: > > On 20.08.2018 22:12, Rob Herring wrote: > >> On Sat, Aug 18, 2018 at 06:54:17PM +0300, Dmitry Osipenko wrote: > >>> Splitting GART and Memory Controller wasn't a good decision that was = made > >>> back in the day. Given that the GART driver hasn't ever been used by > >>> anything in the kernel, we decided that it will be better to correct = the > >>> mistakes of the past and merge two bindings into a single one. In a r= esult > >> > >> As a result... > >> > >>> there is a DT ABI change for the Memory Controller that allows not to > >>> break newer kernels using older DT by introducing a new required prop= erty, > >>> the memory clock. Adding the new clock property also puts the tegra20= -mc > >>> binding in line with the bindings of the later Tegra generations. > >> > >> I don't understand this part. It looks to me like you are breaking=20 > >> compatibility. The driver failing to probe with an old DT is okay? > >=20 > > Yes, DT compatibility is broken. New driver won't probe/load with the o= ld DT, > > that's what we want. > >=20 > >> OS's like OpenSUSE use new DTs with older kernel versions, so you shou= ld=20 > >> consider how to not break them as well. I guess if all this is optiona= l=20 > >> or has been unused, then there shouldn't be a problem. > >=20 > > That's interesting.. Memory Controller isn't optional, I guess we could= change > > compatible to "nvidia,tegra20-mc-gart". >=20 > * I meant it's not optional in a sense that it's enabled in kernels confi= g by > default and driver is functional, but it's okay if MC driver will stop to= probe > with older kernels as it is used only for reporting memory errors. Yeah, we don't really regress at runtime. The errors reported by the current driver are very rare, and even if you encounter them, they're pretty cryptic, so I think this is one of the exceptional cases where breaking the ABI "for the greater good" is acceptable. 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