Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp7258260imm; Tue, 28 Aug 2018 08:54:24 -0700 (PDT) X-Google-Smtp-Source: ANB0VdayHuWmg4j2+C9rncYAnS/ppBKp81UZnI00YNawolYuZ2YYIvULJnXD+HO6QXpd3gwYx85S X-Received: by 2002:a17:902:7613:: with SMTP id k19-v6mr2154276pll.317.1535471664396; Tue, 28 Aug 2018 08:54:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535471664; cv=none; d=google.com; s=arc-20160816; b=iCeFN2swshlQvewnYVEkaqNR5eZSs65+dqLm4WX4Ol25xtDE9RqbtLZhnTVqZuIadV DBJ9Jq2GfjfLuupBbKQeyTgRr6Mj0qStmyxEWzFLEJShvdI099FESJihZMcM7osEtpUW /76Su8eQvI8pmi0Wcja0ZcoNs/xqHMynGgKnFbusIYj8Xz0p7wY5+bEM5mqWhyGpMyl/ F2aVl5UtIEfiCBsUaBUVPjUHUIcfwcrimpLnvDaF3bSDGtQszveivJiMKRaHaajaMJq6 GRPUW8xtTpFYAcyuxgXq0V2Q6gdPwewR/1tVgGpW7Sbkn3S+h0WRGfVFpm4JbyA3+Nwp EDFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=50OT2lLHjCwocSvWkUK8IUDlSf5iOn6YrUPOw1NHjus=; b=nnfjSHGS5LJKMv1u2KHhkfIiMJewjye5wJQo78j6UgGvqG6xfB666pNcwsnw7cvPoq Dc3W0Udp9JYLjdyQEMy7nmiQSq+YyMnfGe/AaGaV9bT4sH1Hr9IKMi2W8iXLnWdIjGVd epcOs7U0DJ109+nLrBb0VTPUFpB3yVOJGSeortZGJH/ft59CUtU9nPALOYGHJwm0hZ7X /+8xJY44ZpU/kTJ87CruM3fwzP/kES6ydW76xwnLsfusqpaubidFV8C47CEWjMbfwt6t jk+Qy83BmAOy4lEkxVVgBt66RIBXF9RSu2jm06jjJ8xcohBA5OYBiLvHdvn7oz+UbDUM rXUg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 123-v6si1302147pfd.201.2018.08.28.08.54.09; Tue, 28 Aug 2018 08:54:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727940AbeH1To5 (ORCPT + 99 others); Tue, 28 Aug 2018 15:44:57 -0400 Received: from foss.arm.com ([217.140.101.70]:41164 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726383AbeH1To4 (ORCPT ); Tue, 28 Aug 2018 15:44:56 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 40CAA1684; Tue, 28 Aug 2018 08:52:40 -0700 (PDT) Received: from e112298-lin.Emea.Arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 52A6E3F557; Tue, 28 Aug 2018 08:52:38 -0700 (PDT) From: Julien Thierry To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, daniel.thompson@linaro.org, joel@joelfernandes.org, marc.zyngier@arm.com, mark.rutland@arm.com, christoffer.dall@arm.com, james.morse@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, Julien Thierry Subject: [PATCH v5 22/27] arm64: Add build option for IRQ masking via priority Date: Tue, 28 Aug 2018 16:51:32 +0100 Message-Id: <1535471497-38854-23-git-send-email-julien.thierry@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1535471497-38854-1-git-send-email-julien.thierry@arm.com> References: <1535471497-38854-1-git-send-email-julien.thierry@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Provide a build option to enable using GICv3 priorities to enable/disable interrupts. Tested-by: Daniel Thompson Signed-off-by: Julien Thierry Suggested-by: Daniel Thompson Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/Kconfig | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 29e75b4..d09c6ff 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -944,6 +944,21 @@ config ARM64_SSBD If unsure, say Y. +config USE_ICC_SYSREGS_FOR_IRQFLAGS + bool "Use ICC system registers for IRQ masking" + select CONFIG_ARM_GIC_V3 + help + Using the ICC system registers for IRQ masking makes it possible + to simulate NMI on ARM64 systems. This allows several interesting + features (especially debug features) to be used on these systems. + + Say Y here to implement IRQ masking using ICC system + registers when the GIC System Registers are available. The changes + are applied dynamically using the alternatives system so it is safe + to enable this option on systems with older interrupt controllers. + + If unsure, say N + menuconfig ARMV8_DEPRECATED bool "Emulate deprecated/obsolete ARMv8 instructions" depends on COMPAT -- 1.9.1