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[209.132.180.67]) by mx.google.com with ESMTP id 31-v6si6164081pla.129.2018.08.29.22.26.42; Wed, 29 Aug 2018 22:26:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="U/kdHnSU"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727425AbeH3JZw (ORCPT + 99 others); Thu, 30 Aug 2018 05:25:52 -0400 Received: from mail-qt0-f194.google.com ([209.85.216.194]:45724 "EHLO mail-qt0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725836AbeH3JZv (ORCPT ); Thu, 30 Aug 2018 05:25:51 -0400 Received: by mail-qt0-f194.google.com with SMTP id g44-v6so8453808qtb.12 for ; Wed, 29 Aug 2018 22:25:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=F3CScztbtZ/psEk7sEi67MYjZ5h13KfG6E/erELe5b0=; b=U/kdHnSU3YMAgTz+qFImSxOZzvKH3VsdMJPVNTkOEGJIzb4F03dY20ztVzu6vkS9nX GxR+RM53Q9ulOFABIeEH2r8hVPdY3Ws/83TA62aR72eAcWgvhHAfU94iarvlj/GwYeh5 cXcpSsWob4b5Scwh452dv2yau3Dodz04tGcVU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=F3CScztbtZ/psEk7sEi67MYjZ5h13KfG6E/erELe5b0=; b=feeDOHML72+YIQNJ5sMSrD4/V799VW88ByeI5Q7mY7WEZD8zOV8f6uo3Gx+fsD355W dw7Ts/EA5T1OUOUDxhwZTN2EPKkUxmH+e8Roo6JlSK6ktyzUYeWJFCcOrzRG+uc9xZ5F XQDBRJ9v2SC9Csw/P5WGYKfCAj9vOz/tc4MxcpXcgktrSCd35khv1R98xWDh15XCNatj 8nd1jBP0GHryuITmCEfw0xIVUK6AhUvOQ3SwvY/aY1bkpmqaeNOGfVx0PzMOhtPt5n3q zFg4PoQazawwZuocv+Jzrzm1gevHNAFBlBJGD2WTN/mnh9YQzNREkyUgK4D7tfp7ws9+ h1QQ== X-Gm-Message-State: APzg51DQPX5j9eBmBxqxzDrUF46Tb84fpjF/6Yr5PFdWg2VV5yCOkyV7 AGIfECSc55gQ8g/kV42CzV/U6YOmg3RlkbH/y5bZ1Q== X-Received: by 2002:ac8:2f24:: with SMTP id j33-v6mr9816308qta.93.1535606728249; Wed, 29 Aug 2018 22:25:28 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Amit Kucheria Date: Thu, 30 Aug 2018 10:55:17 +0530 Message-ID: Subject: Re: [PATCH v1] arm64: dts: sdm845: enable tsens thermal zones To: Daniel Lezcano Cc: Linux Kernel Mailing List , Rajendra Nayak , linux-arm-msm , Bjorn Andersson , Andy Gross , Doug Anderson , mka@chromium.org, Eduardo Valentin , David Brown , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , "open list:ARM/QUALCOMM SUPPORT" , DTML , Lists LAKML Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Aug 29, 2018 at 3:09 PM Daniel Lezcano wrote: > > On 18/07/2018 09:49, Amit Kucheria wrote: > > One thermal zone per cpu is defined > > The thermal zones are very close, especially when the CPUs belong to the > same 'cluster'. Very likely the temperature will propagate from one core > to another core, so when one core reaches the trip0, there is good > chance the other cores will be close and cross the trip0 threshold too. Agreed. Once we have all the thermal and cpufreq bits in place, I'd like to examine optimisations such as a virtual sensor, using the coefficients to add weights, etc. > Having multiple thermal zones, one per CPU, may trigger an interrupts > storm with the passive polling timer delay. I'm working on irq support for tsens that should alleviate that. > Does this board have a cooling device per CPU also ? As Matthias mentioned, DVFS is per cluster (4 cpus to a cluster).