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[209.85.221.47]) by smtp.gmail.com with ESMTPSA id l30-v6sm4773035edc.70.2018.08.31.04.10.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 31 Aug 2018 04:10:27 -0700 (PDT) Received: by mail-wr1-f47.google.com with SMTP id m27-v6so10861419wrf.3; Fri, 31 Aug 2018 04:10:26 -0700 (PDT) X-Received: by 2002:adf:e486:: with SMTP id i6-v6mr10729462wrm.145.1535713826606; Fri, 31 Aug 2018 04:10:26 -0700 (PDT) MIME-Version: 1.0 References: <20180830190120.722-1-clabbe.montjoie@gmail.com> <20180830190120.722-10-clabbe.montjoie@gmail.com> <20180831073500.zubqpvar4yhjqrge@flea> <20180831075631.GB16301@Red> <20180831092934.GC16301@Red> In-Reply-To: <20180831092934.GC16301@Red> From: Chen-Yu Tsai Date: Fri, 31 Aug 2018 19:10:13 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v4 09/13] ARM: dts: sun8i: r40: add sata node To: LABBE Corentin Cc: Maxime Ripard , axboe@kernel.dk, Hans de Goede , Kishon Vijay Abraham I , Mark Rutland , Rob Herring , devicetree , linux-arm-kernel , linux-ide@vger.kernel.org, linux-kernel , linux-sunxi , Icenowy Zheng Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Aug 31, 2018 at 5:29 PM Corentin Labbe wrote: > > On Fri, Aug 31, 2018 at 03:58:34PM +0800, Chen-Yu Tsai wrote: > > On Fri, Aug 31, 2018 at 3:56 PM Corentin Labbe > > wrote: > > > > > > On Fri, Aug 31, 2018 at 09:35:00AM +0200, Maxime Ripard wrote: > > > > On Thu, Aug 30, 2018 at 09:01:16PM +0200, Corentin Labbe wrote: > > > > > R40 have a sata controller which is the same as A20. > > > > > This patch adds a DT node for it. > > > > > > > > > > Signed-off-by: Icenowy Zheng > > > > > Signed-off-by: Corentin Labbe > > > > > --- > > > > > arch/arm/boot/dts/sun8i-r40.dtsi | 23 +++++++++++++++++++++++ > > > > > 1 file changed, 23 insertions(+) > > > > > > > > > > diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi > > > > > index 852c2ccc3268..d6b5820da850 100644 > > > > > --- a/arch/arm/boot/dts/sun8i-r40.dtsi > > > > > +++ b/arch/arm/boot/dts/sun8i-r40.dtsi > > > > > @@ -550,6 +550,29 @@ > > > > > #size-cells = <0>; > > > > > }; > > > > > > > > > > + ahci: sata@1c18000 { > > > > > + compatible = "allwinner,sun8i-r40-ahci"; > > > > > + reg = <0x01c18000 0x1000>; > > > > > + interrupts = ; > > > > > + clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>; > > > > > + resets = <&ccu RST_BUS_SATA>; > > > > > + resets-name = "ahci"; > > > > > + #address-cells = <1>; > > > > > + #size-cells = <0>; > > > > > + status = "disabled"; > > > > > + > > > > > + sata_port: sata-port@0 { > > > > > + reg = <0>; > > > > > + phys = <&sata_phy>; > > > > > + }; > > > > > + }; > > > > > + > > > > > + sata_phy: sata-phy@1c180c0 { > > > > > + compatible = "allwinner,sun8i-r40-sata-phy"; > > > > > + reg = <0x1c180c0 0x200>; > > > > > > > > Overlapping devices in the DTS is not ok. > > > > > > > > > > I do the same than arch/arm/boot/dts/berlin2.dtsi (sata@e90000 phy@e900a0) > > > But since it is not a good justification, it seems that regmap is my only solution ? > > > > Since you are effectively splitting one device node into two, you should > > adjust the original (ahci) device nodes register range. > > > > I cannot do that if I remove patch 13, iow If I keep phy init code in both place as you requested. Then you need to split the phy handling between a10 and r40. A10 doesn't need phy-supply at the moment anyway. And migrating A10 to newer binding is only causing you problems anyway. Just drop that part, and handle the R40. ChenYu