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[209.132.180.67]) by mx.google.com with ESMTP id s1-v6si10129652pgj.405.2018.08.31.11.31.25; Fri, 31 Aug 2018 11:31:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727495AbeHaWia (ORCPT + 99 others); Fri, 31 Aug 2018 18:38:30 -0400 Received: from mail-qk1-f196.google.com ([209.85.222.196]:43711 "EHLO mail-qk1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727235AbeHaWi3 (ORCPT ); Fri, 31 Aug 2018 18:38:29 -0400 Received: by mail-qk1-f196.google.com with SMTP id 130-v6so2006507qkd.10; Fri, 31 Aug 2018 11:29:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=/9/IhKKUyj4WXbJH15/JfXWKtZghPbWpuI4ZumXr1NU=; b=GgR3hk5gfhnpatAoqiQaHfbDv8hIPXi2jiF0j/kNhCOqClsJytSSViEcWQJ64v1R6q IprGhXqzhFz1LvqpOH2qU04oo9cGcRtUyVoQS9DX0BNUeOfibYk5tKKS8LGu2pwd9Gds lMxtVDAj5Mc9T5wp7ZA2MYNtKXuH7eoo/f+tcckih8FDGozxEc6y21CZkmP+prRJVLy4 Zre6Byw085S4FsgwAMvayyQnzOW1O+I6sW4LypIiCQnFIDaj0lPsmGBittMzW+cYc7Ya B7v7ZNhsIAOdUp1mFy9r5EdUdK0Afiispr6GoIIAeJhU7qQRjiSzPLkjDG96IeWaZxWF arOw== X-Gm-Message-State: APzg51BQ0+wuoqHFMmXmoOFishPAvhNRCFwQZ+APaLVGbSiAWkKAaY1F NeEhYB6gGvec+52gXKGvK13hGF0kSe6nBePOfUg= X-Received: by 2002:a37:7347:: with SMTP id o68-v6mr16679739qkc.291.1535740186108; Fri, 31 Aug 2018 11:29:46 -0700 (PDT) MIME-Version: 1.0 References: <1535453838-12154-1-git-send-email-sunil.kovvuri@gmail.com> <1535453838-12154-12-git-send-email-sunil.kovvuri@gmail.com> In-Reply-To: From: Arnd Bergmann Date: Fri, 31 Aug 2018 20:29:29 +0200 Message-ID: Subject: Re: [PATCH 11/15] soc: octeontx2: Add Marvell OcteonTX2 CGX driver To: Sunil Kovvuri Cc: Linux Kernel Mailing List , Olof Johansson , Linux ARM , linux-soc@vger.kernel.org, sgoutham@marvell.com Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Aug 31, 2018 at 6:01 PM Sunil Kovvuri wrote: > On Fri, Aug 31, 2018 at 7:50 PM Arnd Bergmann wrote: > > Thanks for the suggestion, that does makes sense. > Actually i did thought about it, but i was skeptical if it would be > acceptable to make > a single module out of drivers registering for two different PCI devices. I don't think it matters much whether there is one module or two (others might have a strong opinion one way or the other). What is important though are these two points: - How to represent the two PCI devices to user space: You should only have one interface to user space I think, and this should be similar to how other drivers manage similar cases (I don't actually know what they do, but I assume you've done some research here) - How you connect find the pair of devices: Generally speaking while the SoC might only have one of each, you shouldn't make that assumption in the code, but instead have a reliable way of having one driver wait for the other driver to finish probing so you can match the pair. > Will wait for few more days for more feedback from anyone and port v2 series. Ok. Arnd