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Mon, 3 Sep 2018 02:08:44 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=4C8cxboLv0Vgr0hTTy/4dOc3Bo6bS9/KR/jbfha4Xik=; b=gIJ+TY5L6PlkKJiSPKAt0qcHxDbOLisJP72Nq0IsFUZ0SLQsQt6V1I8j9bcyajnhUG8s5UouuNeXBr4n+RgiCgIHte9aD4fdAeZKhBlHHgI5B2jIctcXz6W9zj2AzavUWk6vwWN3bTX3JrcJ5vJnc/dtqHh0BkJGgpxWgGcw4XQ= Received: from AM6PR0402MB3911.eurprd04.prod.outlook.com (52.133.30.10) by AM6PR0402MB3446.eurprd04.prod.outlook.com (52.133.19.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1080.15; Mon, 3 Sep 2018 01:50:48 +0000 Received: from AM6PR0402MB3911.eurprd04.prod.outlook.com ([fe80::ccea:795:beb3:5637]) by AM6PR0402MB3911.eurprd04.prod.outlook.com ([fe80::ccea:795:beb3:5637%2]) with mapi id 15.20.1080.020; Mon, 3 Sep 2018 01:50:48 +0000 From: Anson Huang To: Shawn Guo CC: "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , Fabio Estevam , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "linux@armlinux.org.uk" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , dl-linux-imx Subject: RE: [PATCH 1/2] ARM: dts: imx7s: enable cpuidle driver Thread-Topic: [PATCH 1/2] ARM: dts: imx7s: enable cpuidle driver Thread-Index: AQHUP1XYMcXheLOq0kWyf3Mbjf5HqaTdyMwAgAAJc8A= Date: Mon, 3 Sep 2018 01:50:48 +0000 Message-ID: References: <1535518847-24417-1-git-send-email-Anson.Huang@nxp.com> <20180903011625.GZ3850@dragon> In-Reply-To: <20180903011625.GZ3850@dragon> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [119.31.174.66] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;AM6PR0402MB3446;6:QGhjtv90warASKoUEOL2x14ocUxwTEjeRZXRVLvwK/6YAUKQljXTzy+ZuPUA9DIKUbdVjYipeRzxEoHReU2OHR4UGte9/NP0TKAewIxI+CeC5AzQ6gvWCvptn+jIzzyWUzvYFukb3K5XiDdcLrW04V5fM7Zs0Ltt1OibFZYze91GhnU8AlrhCTVXwm+5ByvV2zC7IViTJjvayDol24kMoLDlgeBnk9f2ZogiHNASbk+I7SvS/ON7dz2vVt1/L7ENNvLYPpp8hzdiI/ImPLXfiA/v6zBn2DAzqp5OuBCZo9OOEt4EkypsTsbM4Xqqc2PObHOxH4EzGBnqUwDcW5SyJN4hc79gZmWCgY4ux3FrZDAe7DFt9Vs/l0rTB7rX7BPSOwzy7WM8Qy/kU7ZRNlc58exEZisFKN8XOVNcmTHWS64KrUkq7aG0pN8Ob+Yo7ck9duhjII3AhK2T4zZafFcL2Q==;5:8i0hCbQoqNwyW+pSyodeNwpQb5GnORwTN0dVp0W7eaOjY9r4ANgjW23nzKvhsydb6QwBaCWD2I5yMlxpi+tdg3P0azv+65hI1FrQ+eGBrzbgdLaBCTPlAIll782lVoL8S6hRBJSAmBIJQfstpWNfGFciI7NzvQFyF0RcfSQpRDQ=;7:TPiK63MUQPBCwv3wZdI89OZzdJxXlcijf0rjAEwQbai9WGLRq2sl/lBwjFNvA6S38Bvb+05TQ2pMEMdVbvzxwizkOolyyM2jFsaIbrmqLyYH7B97TzKXpiR+dhPN2ACmQA+H4cAC5qSRfpO9kM+pdX6TAzGunOF+o7w25sWThDY6auySuITLfIShJ2TQc+FOSSNcNeEj5ApY4LeoUbjBl6BdjgVw9errMoa58koThmngRedqgbx5PSCh6mCoOoff x-ms-exchange-antispam-srfa-diagnostics: SOS; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 35270175-49ef-4f7a-f015-08d6113fac24 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Sep 2018 01:50:48.7280 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR0402MB3446 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Anson Huang Best Regards! > -----Original Message----- > From: Shawn Guo > Sent: Monday, September 3, 2018 9:16 AM > To: Anson Huang > Cc: s.hauer@pengutronix.de; kernel@pengutronix.de; Fabio Estevam > ; robh+dt@kernel.org; mark.rutland@arm.com; > linux@armlinux.org.uk; linux-arm-kernel@lists.infradead.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; dl-linux-imx > > Subject: Re: [PATCH 1/2] ARM: dts: imx7s: enable cpuidle driver >=20 > On Wed, Aug 29, 2018 at 01:00:46PM +0800, Anson Huang wrote: > > Enable cpuidle for i.MX7S/D using generic ARM cpuidle driver, below 2 > > idle states enabled: > > > > 1. ARM WFI; > > 2. SoC WAIT mode. > > > > Signed-off-by: Anson Huang > > --- > > arch/arm/boot/dts/imx7d.dtsi | 1 + > > arch/arm/boot/dts/imx7s.dtsi | 14 ++++++++++++++ > > 2 files changed, 15 insertions(+) > > > > diff --git a/arch/arm/boot/dts/imx7d.dtsi > > b/arch/arm/boot/dts/imx7d.dtsi index 7cbc2ff..4d0d0f6 100644 > > --- a/arch/arm/boot/dts/imx7d.dtsi > > +++ b/arch/arm/boot/dts/imx7d.dtsi > > @@ -20,6 +20,7 @@ > > reg =3D <1>; > > clock-frequency =3D <996000000>; > > operating-points-v2 =3D <&cpu0_opp_table>; > > + cpu-idle-states =3D <&CPU_SLEEP>; > > }; > > }; > > > > diff --git a/arch/arm/boot/dts/imx7s.dtsi > > b/arch/arm/boot/dts/imx7s.dtsi index 93884ce..cf5570b 100644 > > --- a/arch/arm/boot/dts/imx7s.dtsi > > +++ b/arch/arm/boot/dts/imx7s.dtsi > > @@ -54,6 +54,19 @@ > > #address-cells =3D <1>; > > #size-cells =3D <0>; > > > > + idle-states { > > + entry-method =3D "psci"; > > + > > + CPU_SLEEP: WAIT { >=20 > I understand uppercase is allowed, but we conventionally use lowercase fo= r > label and node name. Can we do something like below? >=20 > cpu_sleep_wait: cpu-sleep-wait { > ... > } =20 Sure, please review V2 patch, thanks! Anson >=20 > Shawn >=20 > > + compatible =3D "arm,idle-state"; > > + arm,psci-suspend-param =3D <0x0010000>; > > + local-timer-stop; > > + entry-latency-us =3D <100>; > > + exit-latency-us =3D <50>; > > + min-residency-us =3D <1000>; > > + }; > > + }; > > + > > cpu0: cpu@0 { > > compatible =3D "arm,cortex-a7"; > > device_type =3D "cpu"; > > @@ -61,6 +74,7 @@ > > clock-frequency =3D <792000000>; > > clock-latency =3D <61036>; /* two CLK32 periods */ > > clocks =3D <&clks IMX7D_CLK_ARM>; > > + cpu-idle-states =3D <&CPU_SLEEP>; > > }; > > }; > > > > -- > > 2.7.4 > > > > > > _______________________________________________ > > linux-arm-kernel mailing list > > linux-arm-kernel@lists.infradead.org > > https://emea01.safelinks.protection.outlook.com/?url=3Dhttp%3A%2F%2Flis= t > > > s.infradead.org%2Fmailman%2Flistinfo%2Flinux-arm-kernel&data=3D02%7C > > > 01%7CAnson.Huang%40nxp.com%7C8ce1cddcac05444edc1408d6113b0a76%7 > C686ea1 > > > d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636715342610651079&sda > ta=3Dx9l% > > > 2FrkV8Uo8CtSa0jJsBZ%2FXt2DE3ZRQ5TWXm5%2Fbwvag%3D&reserved=3D > 0