Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp2091620imm; Mon, 3 Sep 2018 18:54:39 -0700 (PDT) X-Google-Smtp-Source: ANB0VdY6KwNj2Ws1Mr194b/ub1iYKXSCWbobFAavBqL2v4biVEKRz5Vx97eU26hrn72ypdOrffPz X-Received: by 2002:a62:e008:: with SMTP id f8-v6mr32508763pfh.208.1536026079667; Mon, 03 Sep 2018 18:54:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536026079; cv=none; d=google.com; s=arc-20160816; b=Q+mwuejBTcI4kh6nPnoBtfotohB2mpc3AUw6q3bEUiPnzryFgK92sBmsST/kyjolGA S9qG+farK+PjPKz9zROEw7F/htbdWFO+tgiiOhQVv3t2aiWfWgWe2LCdOkU09w260aIv xc2tksfB/d8Q2yuulBQLGNAuXrhd1kIMURKhhli5hhNQS1O1mFQ2E3rdZ2DpDeC9bHpP f3JT/DRObkxpK8cDXdT/NsaZoiHY7K2g7r69NrOixSMd/okf7Z6EODYi+FaKaXOGXld/ t2YZXyDUeFgmXt/sEzCNFwc+X0K7Q7y9//Day5QYt8DkhyfCKxGpCl7oHKfZD2SiTeVC /Wsg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=tWPd3qyA1mfMv4bSPjyQ7d7wokigFpUEvM/tE1IIDd0=; b=owMAbjkQDJj5VnkVTA9I05SZenL/H7b/zDzkdwGAKAtwHw+dHgC0DwucspisDRcqWf JsErVG3EG2p/yTuUk8fgYLypXRmu7oIWKZKksoxuIU6y0zMgOG43rxp1Ch5U7kDcCJCk Tn7dVNnBzA/SwIMl1NVkz4sr1MsWbvLQyhA4QZZOicPqfl0s4ZqZ+T3uxqcfhM/UyUHH 1WI5IEbbox/8XLChMp1iXr/XxzGovJ492UoPNgeF62CLFKZTFgS/DGJXW8CqovkSQOFq 17MWJ+OFHTrC/f5AKzwKIZ2iPMAxnb3kXSUwF7wguUFaA76sfriSSYKJgR/BCaeuqFtp 04Tw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u134-v6si21547306pfc.244.2018.09.03.18.54.24; Mon, 03 Sep 2018 18:54:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726231AbeIDGOu (ORCPT + 99 others); Tue, 4 Sep 2018 02:14:50 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:35574 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725837AbeIDGOt (ORCPT ); Tue, 4 Sep 2018 02:14:49 -0400 X-UUID: 8c168b5b5a8d44e88bf6a53ca85e8b4f-20180904 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 39185782; Tue, 04 Sep 2018 09:51:53 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Tue, 4 Sep 2018 09:51:52 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Tue, 4 Sep 2018 09:51:52 +0800 From: Leilk Liu To: Mark Brown CC: Mark Rutland , Matthias Brugger , Sascha Hauer , , , , , , , , Leilk Liu Subject: [PATCH v2 3/3] arm64: dts: Add spi slave dts Date: Tue, 4 Sep 2018 09:51:46 +0800 Message-ID: <1536025906-24422-4-git-send-email-leilk.liu@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1536025906-24422-1-git-send-email-leilk.liu@mediatek.com> References: <1536025906-24422-1-git-send-email-leilk.liu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds MT2712 spi slave into device tree. Signed-off-by: Leilk Liu --- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi index 75cc0f7..59b3c3c 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -301,6 +301,18 @@ status = "disabled"; }; + spis1: spi@10013000 { + compatible = "mediatek,mt2712-spi-slave"; + reg = <0 0x10013000 0 0x100>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_AO_SPI1>; + clock-names = "spi-clk"; + assigned-clocks = <&topckgen CLK_TOP_SPISLV_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>; + spi-slave; + status = "disabled"; + }; + apmixedsys: syscon@10209000 { compatible = "mediatek,mt2712-apmixedsys", "syscon"; reg = <0 0x10209000 0 0x1000>; -- 1.7.9.5