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Peter Anvin" , kirill.shutemov@linux.intel.com Cc: x86@kernel.org, kexec@lists.infradead.org, linux-kernel@vger.kernel.org, tglx@linutronix.de, mingo@kernel.org Subject: Re: [PATCH 1/3] x86/boot: Add bit fields into xloadflags for 5-level kernel checking Message-ID: <20180904060649.GK1740@192.168.1.3> References: <20180829141624.13985-1-bhe@redhat.com> <20180829141624.13985-2-bhe@redhat.com> <6ea94875-ae07-6220-eb3e-d3f830cdac03@zytor.com> <20180904034414.GI1740@192.168.1.3> <4546fc39-4982-4c91-c812-0df1e9bc9e20@zytor.com> <20180904052036.GJ1740@192.168.1.3> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.1 (2017-09-22) X-Scanned-By: MIMEDefang 2.78 on 10.11.54.6 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.6]); Tue, 04 Sep 2018 06:06:54 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.6]); Tue, 04 Sep 2018 06:06:54 +0000 (UTC) for IP:'10.11.54.6' DOMAIN:'int-mx06.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'bhe@redhat.com' RCPT:'' Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 09/03/18 at 10:46pm, H. Peter Anvin wrote: > On 09/03/18 22:20, Baoquan He wrote: > > On 09/03/18 at 09:13pm, H. Peter Anvin wrote: > >> On 09/03/18 20:44, Baoquan He wrote: > >>> > >>> 1) in arch/x86/kernel/relocate_kernel_64.S, we set X86_CR4_LA57 into cr4 > >>> if the 1st kernel is in 5-level mode. Then in > >>> arch/x86/boot/compressed/head_64.S, paging_prepare() is called to decide > >>> if 5-level mode will be enabled, and prepare the trampoline. If > >>> kexec/kdump kernel is expected to be in 4-level, e.g with 'nolv5' > >>> specified, it still can handle well. But for the old kernel w/o these > >>> 5-level codes, it will ignore the fact that X86_CR4_LA57 has been set > >>> in CR4 and proceed anyway, then #GP is triggered. That's why XLF_5LEVEL > >>> is used to mark. > >>> > >> > >> That's what I'm saying, don't do that. Always jump into the second kernel in > >> 4-level mode, i.e. X86_CR4_LA57 unset. That's the only sane thing. > > > > Well, this might not be suggested. Kexec has been a formal feature in > > our distro, our customers usually use it to reboot high end servers > > because those machines may take one hour to boot up from firmware. And > > 5-level may be also supported very soon, if people want to do a fast > > reboot from the current kernel in 5-level, and expect to see it's in > > 5-level too in the 2nd kernel, this always kexec jumping to the 2nd > > kernel in 4-level mode might be unaccepted. > > > > That makes no sense. I'm talking about *entering* the kernel; the second > kernel should switch to 5-level mode as necessary. OK, I didn't get your point. I forget what difficulty was met so that Kirill need to take this way. In that way, we will never have chance to put kernel above 64TB even from 5-level kernel to jump to 5-level kernel. Hi Kirill, Could you help to explain why the current implementation is decided? Thanks Baoquan