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[209.132.180.67]) by mx.google.com with ESMTP id 1-v6si23171967plt.148.2018.09.04.12.00.17; Tue, 04 Sep 2018 12:00:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@infradead.org header.s=bombadil.20170209 header.b=tteTTEjQ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727972AbeIDXYz (ORCPT + 99 others); Tue, 4 Sep 2018 19:24:55 -0400 Received: from bombadil.infradead.org ([198.137.202.133]:57750 "EHLO bombadil.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727315AbeIDXYz (ORCPT ); Tue, 4 Sep 2018 19:24:55 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20170209; h=In-Reply-To:Content-Type:MIME-Version :References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=whaxffAaLWoJetFF3cZGrUpGCbLulf3A2BdMQh63MWM=; b=tteTTEjQdSPHivYM/c2jPEw5E 0bqlM/zbagC28NbHiLtsJ7PrueApHQQkGXt2y2Peh70FGBk8CR8p198pTi3emKRLdisOW1dFqhg9l 74scZuuKkpqS8eOkhKefLqoy+Bz1nrhrH6ra4FzBfe9F2q3+TYT1u7ePr9HppgflJODYH2lDtRBwj 7ShLzeB9UuEWzpQ7BRvyl7SXZeM67SVNjZYFBsUPKeOLKhKq6/TlqdVFSZj7Xn4uEB7Sp3e0oO+9y 1rpDxHBlHenseOM27ztUoQqGQdjjpUCWiYUgUvaIwqqgmi5jbczpTRghO1/ZkbU2Wh+QSi1PdQV9T uXfU5ucXw==; Received: from hch by bombadil.infradead.org with local (Exim 4.90_1 #2 (Red Hat Linux)) id 1fxGWw-0001a5-RU; Tue, 04 Sep 2018 18:58:26 +0000 Date: Tue, 4 Sep 2018 11:58:26 -0700 From: Christoph Hellwig To: Anup Patel Cc: Palmer Dabbelt , Albert Ou , Daniel Lezcano , Thomas Gleixner , Jason Cooper , Marc Zyngier , Atish Patra , Christoph Hellwig , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [RFC PATCH 5/5] clocksource: riscv_timer: Make timer interrupt as a per-CPU interrupt Message-ID: <20180904185826.GE25119@infradead.org> References: <20180904124514.6290-1-anup@brainfault.org> <20180904124514.6290-6-anup@brainfault.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180904124514.6290-6-anup@brainfault.org> User-Agent: Mutt/1.9.2 (2017-12-15) X-SRS-Rewrite: SMTP reverse-path rewritten from by bombadil.infradead.org. See http://www.infradead.org/rpr.html Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 04, 2018 at 06:15:14PM +0530, Anup Patel wrote: > Instead of directly calling RISC-V timer interrupt handler from > RISC-V local interrupt conntroller driver, this patch implements > RISC-V timer interrupt as a per-CPU interrupt using per-CPU APIs > of Linux IRQ subsystem. And the point of that is? Except for introducing lots of pointless code of course..